Heung-Bae Lee

A Single-Chip CMOS Transceiver for UHF Mobile RFID Reader

A UHF mobile RFID single-chip reader is implemented in a 0.18mum CMOS technology. The reader IC integrates an RF transceiver, a digital baseband modem, an MPU and host interfaces in 4.5 times 5.3mm2. The RF transceiver draws 61mA from a 1.8V supply and achieves an 8dBm P1dB, an 18.5dBm IIP3, and a 4dBm TX power.

A fully integrated 2.4-GHz CMOS RF transceiver for IEEE 802.15.4

A fully integrated 2.4 GHz CMOS transceiver IC for the low power wireless personal area network (WPAN) is reported. This is based on a dual-conversion architecture receiver and transmitter which are suitable for silicon integration. The frequency synthesizer offering 1.92 GHz and 480 MHz quadrature LO signals are also integrated on the radio chip. In the proposed transceiver, linearity is improved by using current mirror amplifier based mixer. The optimization between dynamic range and current consumption has been achieved by the interleaved analog filter-amplifier chain. The fully integrated transceiver is fabricated in 0.18 mum CMOS technology and the die area of the single-chip IC is 3.7 mm times 3.6 mm. It consumes only 31 mW in the receiver mode and 42 mW in the transmitter mode with 1.8-V supply

A fully integrated CMOS RF transmitter for UHF mobile RFID reader applications

This paper presents a low power CMOS transmitter for UHF mobile RFID applications, in a 0.18-mum CMOS technology. It uses a directional coupler in front of an antenna to reduce transmitter carrier leakage at receiver front-end and to be integrated into mobile handset with a single antenna. It adapts a direct conversion transmitter and consists of low pass filter, variable gain amplifier, up-conversion mixer and drive amplifier. The transmitter supports both the single-side-band (SSB) and the double-side-band (DSB) modulation for the reader-to-tag communications. This IC consumes only 31 mA in SSB mode and 27 mA in DSB mode from a 1.8 V power supply voltage to provide a 4 dBm output power at drive amplifier. The measured LO leakage, output 1 dB compression point and 3rd order output intercept point achieve 5SdBc, 4.5 dBm and 14.5 dBm, respectively.

A Fully Integrated CMOS LC VCO and Frequency Divider for UHF RFID Reader

This paper presents a 0.18-mum CMOS fully integrated LC VCO, suitable for radio frequency identification (RFID) reader working at 900 MHz. The VCO comprises cross-coupled double core and PMOS tail current source to suppress 1/f noise up conversion. To minimize pulling, the 900 MHz VCO is generated by a 1.8GHz VCO followed by a frequency divider. In addition, current source of this topology was applied bandgap reference to reduce effect of temperature and supply voltage variation, which is caused by unstable oscillation state. The measured result of phase noise is demonstrated with -106 dBc/Hz at 100 kHz offset. The power consumption of the VCO including bandgap reference, frequency divider, and buffer amplifiers is 37.4mW from a 1.8V supply voltage

Frequency Generation for Mobile RFID Reader

This paper presents a 0.18-mum CMOS fully integrated LC VCO and fractional-N phase-locked loop(PLL), suitable for radio frequency identification (RFID) reader working at 900 MHz. The VCO comprises cross-coupled double core and PMOS tail current source to suppress 1/f noise up conversion. To minimize pulling, the 900 MHz VCO is generated by a 1.8 GHz VCO followed by a frequency divider. In addition, current source of this topology was applied bandgap reference to reduce effect of temperature and supply voltage variation, which is caused by unstable oscillation state. The phase noise of a free-running VCO is demonstrated with -106 dBc/Hz at 100kHz offset. The PLLs loop bandwidth is measured to be 64KHz, with a fractional spurious level of -83dBc. The power consumption of the VCO including bandgap reference, frequency divider, and buffer amplifiers is 39.5mW and the PLL is 21.6mW from a 1.8V supply voltage