Heung-Sik Park

The Vth controllability of 5nm body-tied CMOS FinFET

In this paper, we demonstrate a 5nm width body-tied CMOS finFET on bulk Si for the first time. Also the threshold voltage control of the 5nm finFET is shown by using channel and pocket doping profile optimization along the narrow active fin. The excellent performance of finFET such as an excellent subthreshold swing (SS), and drain induced barrier lowering (DIBL) characteristics were found. And the systemic analyses of electrical characteristics dependencies on the fin width were evaluated for various fin width (5 /spl sim/ 100nm).

A novel write method for improving RESET distribution of PRAM

RESET distribution of phase-change random access memory (PRAM) is highly related to heat fluctuations during RESET write (RESET<inf>W</inf>). In this work we investigate the effect of load resistance (R<inf>L</inf>) with constant voltage write method and propose new RESET<inf>W</inf> method with an optimal R<inf>L</inf> selection equation with considering Joule heating and thermoelectric effects. Since the optimal R<inf>L</inf> compensates for intrinsic dynamic resistance variation in PRAM, the heat fluctuation is reduced and the RESET distribution is improved. With fabricated PRAM TEG, we verify that optimal RL exists and achieve more improved RESET distribution with the optimized R<inf>L</inf> by 41% than with R<inf>L</inf> not optimized.

Investigation of Body Bias Dependence of Gate-Induced Drain Leakage Current for Body-Tied Fin Field Effect Transistor

The body bias dependence of gate-induced drain leakage (GIDL) current for a fin field effect transistor fabricated on a bulk Si wafer (bulk FinFET) is investigated. The local damascene (LD) bulk FinFET is measured under various bias conditions and the effect of the body-bias-induced lateral electric field on GIDL current is evaluated. A lateral electric field shield effect under fin depleted condition is proposed and it is validated by the three-terminal band-to-band tunneling current model. The GIDL current of the bulk FinFET can be reduced by reducing the body bias, and an improvement in retention characteristics is expected.