Hichame Maanane

Comparative analysis of accelerated ageing effects on power RF LDMOS reliability

We present in this paper results of comparative reliability study of three accelerated ageing tests applied on power RF LDMOS: Thermal Shock Tests (TST, air-air test), Thermal Cycling Tests (TCT, air-air test) and High Temperature Storage Life (HTSL). The two first tests are carried out with a drain current flowing through the device during stress. The results obtained show the variation and the Devices performance quantitative shifts for some macroscopic electric parameters such as threshold voltage (V th ), transconductance (G m ), drain-source current (I ds ), on-state resistance (R ds on) and feedback capacitance (C rs ) tinder various ageing tests. To understand the degradation phenomena that appear after ageing, we used a new electro-thermal model implemented in Agilents ADS as a reliability tool.

Physical analysis of Schottky contact on power AlGaN/GaN HEMT after pulsed-RF life test.

This paper deals with the physical study of the Schottky contact after pulsed-RF saturated life test under enhanced drain bias voltage on power HEMTs. Electrical measurements showed a pinch-off voltage (VP) shift, a decrease of output power and average drain current while Photon Emission Microscopy (PEM) was used to identify the degradation distribution along the 80 fingers die. Finally, Transmission Electron Microscopy (TEM) is performed to point out the different Schottky degradation between a central finger and an outer one.

Study of RF N− LDMOS critical electrical parameter drifts after a thermal and electrical ageing in pulsed RF

An innovative reliability test bench dedicated to RF power devices is currently implemented. This bench allows to apply both electric and thermal stress for lifetime test under radar pulsed RF conditions. This paper presents the first investigation findings of critical electrical parameter degradations after thermal and electrical ageing. It shows that the tracking of a set of parameters (drain–source current, on-state resistance, threshold voltage, feedback capacitance and

Compared deep class-AB and class-B ageing on AlGaN/GaN HEMT in S-Band pulsed-RF operating life

AlGaN/GaN HEMTs are on the way to lead the RF-power amplification field according to their outstanding performances. However, due to its relative youth, reliability studies in several types of operating conditions allow to understand mechanisms peculiar to this technology and responsible for the wearing out of devices. This paper reports the reliability study on two power amplifiers using AlGaN/GaN HEMT. Based on results of a previous study of 1280 h in standard operating conditions wherein no evolution of electrical parameters have been observed, two ageing tests in deep class-AB (432 h) and class-B (795 h) are performed under pulsed-RF operating life at high drain bias voltages and saturated operation. This study shows a drift in RF performances which is linked with the evolution of electrical parameters (RDSON, gm and VP). Similar kinetics and amplitude of degradations are observed revealing quasi-similar contribution of thermal effects in both cases. Degradations are supposed to be related to trapped charges phenomena induced by high voltage operating conditions. Although, several results attest to this hypothesis, a part of the evolutions seems to be linked with structural changes.

A 5000 h RF life test on 330 W RF-LDMOS transistors for radars applications

A reliability test bench dedicated to RF power devices is used to improve 330 W LDMOS in a radar conditions. The monitoring of RF power, drain, gate voltages and currents under various pulses and temperatures conditions are investigated. Numerous duty cycles are applied in order to stress LDMOS. It shows with tracking all this parameters that only few hot carrier injection phenomenon appear with no incidence on RF figures of merit (Pout or PAE). Robustness and ruggedness are shown for LDMOS with this bench for radar applications in L-band.

Hot carrier reliability of RF N- LDMOS for S Band radar application

Abstract This paper presents an innovative reliability bench specifically dedicated to high RF power device lifetime tests under pulse conditions for radar application. A base-station dedicated LDMOS transistor has been chosen for RF lifetests and a complete device electric characterization has been performed. A whole review of its critical electrical parameters after accelerated ageing tests is proposed and discussed. This study tend to explain the physical degradation mechanisms occurred during RF life-tests by means of 2D ATLAS-SILVACO simulations. Finally, the paper demonstrates that N-LDMOS degradation is linked to hot carriers generated interface states (traps) and trapped electrons, which results in a build up of negative charge at Si/SiO2 interface. More interface states are created at low temperature due to a located maximum impact ionization rate at the gate edge.

Electrical parameters degradation of power RF LDMOS device after accelerated ageing tests

This paper reports novel methods for accelerated ageing tests, with comparative reliability between them for stresses applied on power RF LDMOS: Thermal Shock Tests (TST), Thermal Cycling Tests (TCT), High Voltage Drain (HVD) and coupling thermal and electrical effects under various conditions. The investigation findings obtained after various ageing tests show the degradation and the devices performance shifts for most important electric parameters such as transconductance (Gm), on-state resistance (R ds_on ), feedback capacitance (C rss ) and gate-drain capacitance (C gd ). This means that the tracking of these parameters enables to consider the hot carrier injection as the dominant degradation phenomenon. However, this is explained by excitation and trapping of electrons in the oxide-silicon interface at the drain side. A physical simulation software (2D, Silvaco-Atlas) has been used to locate and confirm degradation phenomena.

Characterization and modeling of hot carrier injection in LDMOS for L-band radar application

Abstract This paper reports a methodology to correlate Hot Carrier Injection (HCI) degradation mechanism and electrical figures of merit on Lateral-Diffused Metal–Oxide-Semiconductor (LDMOS) transistor. This method is based on RF life test in radar operating conditions coupled to a high drain voltage in order to make visible HCI degradation. We propose drain current modeling vs. time based on a simple extraction procedure. The electron density trapped in the oxide is extracted from hot carrier induced series resistance enhancement model (HISREM – i.e. Δ R d model). From this methodology, the degradation of RF-LDMOS due to HCI is quantified and could be simulated with EDA.

Study of hot-carrier effects on power RF LDMOS device reliability

Abstract This paper reports comparative reliability of the hot carrier induced electrical performance degradation in power RF LDMOS transistors after RF life-tests and novel methods for accelerated ageing tests under various conditions (electrical and/or thermal stress): thermal shock tests (TST, air–air test) and thermal cycling tests (TCT, air–air test) under various conditions (with and without DC bias, TST cold and hot, different channel current I DS and different extremes temperatures Δ T values). It is important to understand the effects of the reliability degradation mechanisms on the S -parameters and in turn on static and dynamic parameters. The analysis of the experimental results is presented and the physical processes responsible for the observed degradation at different stress conditions are studied by means of 2D ATLAS-SILVACO simulations. The RF performance degradation of hot-carrier effects power RF LDMOS transistors can be explained by the transconductance and miller capacitance shifts, which are resulted from the interface state generation and trapped electrons, thereafter results in a build up of negative charge at Si/SiO 2 interface.

2 – Aging Power Transistors in Operational Conditions

This chapter describes how to perform power microwave transistors lifetime tests in operational conditions. The originality of this test bench is its ability to monitor automatically component performance during thousands of hours and to apply electrical and thermal stresses. This equipment is used to test high power transistors operating in pulsed mode and to record electrical parameter drifts using in-situ static and dynamic electrical characterization. The results of different aging processes of laterally diffused metal oxide semiconductor (LDMOS) high power transistors are presented