J. Marcon

Comparative analysis of accelerated ageing effects on power RF LDMOS reliability

We present in this paper results of comparative reliability study of three accelerated ageing tests applied on power RF LDMOS: Thermal Shock Tests (TST, air-air test), Thermal Cycling Tests (TCT, air-air test) and High Temperature Storage Life (HTSL). The two first tests are carried out with a drain current flowing through the device during stress. The results obtained show the variation and the Devices performance quantitative shifts for some macroscopic electric parameters such as threshold voltage (V th ), transconductance (G m ), drain-source current (I ds ), on-state resistance (R ds on) and feedback capacitance (C rs ) tinder various ageing tests. To understand the degradation phenomena that appear after ageing, we used a new electro-thermal model implemented in Agilents ADS as a reliability tool.

Study of RF N− LDMOS critical electrical parameter drifts after a thermal and electrical ageing in pulsed RF

An innovative reliability test bench dedicated to RF power devices is currently implemented. This bench allows to apply both electric and thermal stress for lifetime test under radar pulsed RF conditions. This paper presents the first investigation findings of critical electrical parameter degradations after thermal and electrical ageing. It shows that the tracking of a set of parameters (drain–source current, on-state resistance, threshold voltage, feedback capacitance and

Hot carrier reliability of RF N- LDMOS for S Band radar application

Abstract This paper presents an innovative reliability bench specifically dedicated to high RF power device lifetime tests under pulse conditions for radar application. A base-station dedicated LDMOS transistor has been chosen for RF lifetests and a complete device electric characterization has been performed. A whole review of its critical electrical parameters after accelerated ageing tests is proposed and discussed. This study tend to explain the physical degradation mechanisms occurred during RF life-tests by means of 2D ATLAS-SILVACO simulations. Finally, the paper demonstrates that N-LDMOS degradation is linked to hot carriers generated interface states (traps) and trapped electrons, which results in a build up of negative charge at Si/SiO2 interface. More interface states are created at low temperature due to a located maximum impact ionization rate at the gate edge.

Electrical parameters degradation of power RF LDMOS device after accelerated ageing tests

This paper reports novel methods for accelerated ageing tests, with comparative reliability between them for stresses applied on power RF LDMOS: Thermal Shock Tests (TST), Thermal Cycling Tests (TCT), High Voltage Drain (HVD) and coupling thermal and electrical effects under various conditions. The investigation findings obtained after various ageing tests show the degradation and the devices performance shifts for most important electric parameters such as transconductance (Gm), on-state resistance (R ds_on ), feedback capacitance (C rss ) and gate-drain capacitance (C gd ). This means that the tracking of these parameters enables to consider the hot carrier injection as the dominant degradation phenomenon. However, this is explained by excitation and trapping of electrons in the oxide-silicon interface at the drain side. A physical simulation software (2D, Silvaco-Atlas) has been used to locate and confirm degradation phenomena.

Determination of beryllium and self-interstitial diffusion parameters in InGaAs

Abstract The diffusion of Be in InGaAs grown by gas source molecular beam epitaxy has been studied. The observed secondary ion mass spectrometry Be profiles, obtained for annealing cycles with a temperature range of 700–900°C, could be explained considering several forms of kick-out mechanism. The beryllium diffusion models in InGaAs have been obtained without a priori hypothesis on interstitial beryllium and self-interstitial. Moreover, the fitting procedure of experimental data has been described precisely. We conclude that two kick-out mechanisms lead to similar fittings of experimental profiles and may not be distinguishable using our experimental conditions.

Modeling of the transient enhanced diffusion of boron implanted into preamorphized silicon: the case of BF2+ implantation

We have simulated transient enhanced diffusion (TED) in the presence of end-of-range (EOR) defects produced by Ge amorphization followed by BF2 implantation. Ostwald ripening of EOR defects has been taken into account. A comparison of annealed profiles with equivalent B implantation shows that the existing models are not sufficient to simulate the BF2 experimental profiles where the boron diffusion depth is very low. We have proposed that the presence of fluorine can act as sinks for interstial boron and, hence, reduces the boron diffusion depth in order to obtain a good approximation of experimental profiles.

Be diffusion in InGaAs layers grown by gas source molecular beam epitaxy

The diffusion of Be from buried Be-doped InGaAs epitaxial layers, grown by gas source molecular beam epitaxy, has been studied for temperatures between 700 and 900°C. A kick-out model, involving neutral Be interstitial species and singly positively charged group III self-interstitials, is proposed for the diffusion mechanism.

Study of hot-carrier effects on power RF LDMOS device reliability

Abstract This paper reports comparative reliability of the hot carrier induced electrical performance degradation in power RF LDMOS transistors after RF life-tests and novel methods for accelerated ageing tests under various conditions (electrical and/or thermal stress): thermal shock tests (TST, air–air test) and thermal cycling tests (TCT, air–air test) under various conditions (with and without DC bias, TST cold and hot, different channel current I DS and different extremes temperatures Δ T values). It is important to understand the effects of the reliability degradation mechanisms on the S -parameters and in turn on static and dynamic parameters. The analysis of the experimental results is presented and the physical processes responsible for the observed degradation at different stress conditions are studied by means of 2D ATLAS-SILVACO simulations. The RF performance degradation of hot-carrier effects power RF LDMOS transistors can be explained by the transconductance and miller capacitance shifts, which are resulted from the interface state generation and trapped electrons, thereafter results in a build up of negative charge at Si/SiO 2 interface.

Characterization and modelling of power RF LDMOS transistor including self-heating effects

In this paper, we propose a new electro-thermal model of power RF LDMOS transistor implemented in Agilents ADS, using symbolic defined device (SDD). The proposed model takes into account the thermal effects and influence of temperature on the I-V characteristics, by providing three thermal capacitances and three thermal resistances, which represent the heat flow from the chip to the ambient air (thermal network). It allows us to study temperature dependent shifts for some macroscopic parameters such as the threshold voltage (V/sub t/), the transconductance (g/sub m/), the conductance (g/sub d/) and the on-state resistance (R/sub ds-on/).

Be diffusion in InGaAs, InGaAsP epitaxial layers and across InGaAs/InGaAsP, InGaAs/InP heterointerfaces

Abstract The diffusion of Be during post-growth Rapid Thermal Annealing (RTA) in InGaAs, InGaAsP, InGaAs/InGaAsP and InGaAs/InP epitaxial structures grown by Gas Source Molecular Beam Epitaxy (GSMBE) has been studied. The observed Secondary Ion Mass Spectrometry (SIMS) concentration distributions, obtained for annealing cycles with time durations of 10–240 s and temperatures in the range of 700–900°C for Be doping concentration of 3×10 19 cm −3 , could be explained by kick-out mechanism considering the neutral Be interstitial species and positively charged group-III self-interstitials.