Hideaki Kohzu

Infrared rapid thermal annealing of Si‐implanted GaAs

Conditions for post‐implantation capless annealing of GaAs, called infrared rapid thermal annealing (IRTA) using halogen lamps, were investigated. Si‐implanted GaAs (5×1012 cm−2, 150 keV) was annealed at temperatures ranging from 700 to 1100 °C for various annealing times. Annealed GaAs at 950 °C for 2–4 s shows about 75% electrical activation and 3700 cm2/Vs electron mobility without noticeable dopant diffusion and surface decomposition. Planar metal‐semiconductor field‐effect transistors (MESFET’s) fabricated on the active layer formed by this annealing method show that the technique is promising as a post‐implantation annealing method for the fabrication of GaAs MESFET’s and GaAs integrated circuits (IC’s).

Infrared rapid thermal annealing for GaAs device fabrication

A new post‐implantation annealing technique, called infrared rapid thermal annealing (IRTA), is discussed for fabricating GaAs devices using ion implantation technology. The IRTA apparatus and capless annealing conditions are described. Also, electrical property and its uniformity of n or n+ type GaAs layers made by Si implantation to semi‐insulating GaAs followed by IRTA are presented, and compared with those made by Si3N4 capped furnace annealing. A steeper carrier concentration profile with a higher peak carrier concentration in the n type active layer made by IRTA results in a higher transconductance without any anomalous characteristics on the GaAs metal–semiconductor field‐effect transistor.

Reliability Study of GaAs MESFET's

Failure modes have been studied phenomenologically on a small-signal GaAs MESFET with a 1mu m aluminum gate. Three major failure modes have been revealed, i.e., gradual degradation due to source and drain contact degradation, catastrophic damage due to surge pulse, and instability or reversible drift of electrical characteristics during operation. To confirm the product quality and to assure the device reliability, a quality assurance program has been designed and incorporated in a production line. A cost-effective lifetime prediction method is presented that utilizes correlations between RF parameters and dc parameters calculated using an equivalent circuit model. Mean time to failure (MTTF) value of over 10/sup 8/ h has been obtained for the GaAs MESFET for an operating channel temperature of 100/spl deg/C.

Electrical properties of S implants in GaAs activated by infrared rapid thermal annealing

S‐implanted GaAs at room temperature was annealed by several seconds radiation from halogen lamps. Differential Hall effect/sheet resistivity measurements have been used to study the annealing behavior and electrical carrier concentration profiles of S‐implanted GaAs. Electrical activation was found to increase with increasing annealing temperature up to 1100 °C. A maximum electrical activation of 78% was obtained for a dose of 5×1013 cm−2. Also, more than 5×1018 cm−3 peak carrier concentration was obtained for a dose of 1×1014 cm−2, indicating about three times higher peak concentration than that obtained after conventional furnace annealing. For higher doses, the implanted S in the annealed GaAs does not follow Gaussian distribution even after rapid annealing. Damage‐enhanced outdiffusion of S is considered to be responsible for this result.

Nonalloyed ohmic contacts to Si‐implanted GaAs activated using SiOxNy capped infrared rapid thermal annealing

SiOxNy capped infrared rapid thermal annealing was investigated for activating high dose (>7×1013 cm−2) Si implants in GaAs. The SiOxNy encapsulation resulted in enhancement in electrical activation. An electron concentration as high as 9×1018 cm−3 was obtained by 1120 °C, 5‐sec annealing using an SiOxNy encapsulant with 1.75 refractive index. Nonalloyed ohmic contacts were formed by depositing AuGe‐Ni on a heavily doped n‐type layer activated by this technique, where a 9×10−5 Ω cm2 specific contact resistance was obtained. Furthermore, low‐temperature (300 °C) alloying significantly improved a specific contact resistance to as low as 6×10−6 Ω cm2 while keeping a smooth morphology. These techniques, including low‐temperature alloying, are promising for GaAs and its heterostructure device applications.

SiOxNy capped annealing for Si‐implanted GaAs

Si‐implanted GaAs was successfully annealed with silicon oxynitride (SiOxNy) encapsulant. By using SiOxNy encapsulant with about 1.75 refractive index, a maximum electrical activation of 87%, which is 30–50% higher than that obtained after SiO2 or Si3N4 capped annealing, was achieved on Si‐implanted GaAs (5×1012 cm−2, 100 keV). In addition, electrical activation after SiOxNy capped annealing remains constant against the variation of film thickness up to 2300 A, indicating minimized interfacial stress between SiOxNy film and GaAs substrate. A maximum carrier concentration of 2.5×1018 cm−3, which is the highest value ever reported on Si‐implanted GaAs, was obtained after SiOxNy capped annealing for 7×1013 cm−2 dose. The controlled amount of Ga outdiffusion in combination with the reduced interfacial stress is considered to be responsible for this high electrical activation.

Thermal Stability in Al/Ti/GaAs Schottky Barrier

Interfacial reaction occurs at the Al/Ti interface in the Al/Ti/GaAs Schottky barrier at low temperatures. Therefore, the barrier layer is required between Al and Ti layers to manufacture thermally stable Al/Ti/GaAs Schottky gates in metal semiconductor field effect transistors (MESFETs). In this study, a double layer of Ti2Ga3 and TiAs is formed by interfacial reaction at the Ti (30 nm thick)/GaAs interface at 450° C. In the double layer, Ti2Ga3 is employed as the barrier layer for Al and the TiAs layer as the Schottky electrode with high barrier height. Interfacial reaction does not occur at the Al/Ti2Ga3 interface with annealing at 450° C and a thermally stable Al/Ti2Ga3/TiAs/GaAs Schottky gate can be obtained by employing the Ti2Ga3 barrier layer formed by this interfacial reaction. Moreover, barrier height can be increased by 0.12 eV in the TiAs/GaAs Schottky gate from that of the Ti/GaAs gate. We describe the barrier effect of the Ti2Ga3 layer for Al.

Carbon Ion Implantation in GaAs

Atom and carrier concentration profiles in carbon-ion-implanted GaAs have been measured. Ion implantation of carbon is performed at 300 keV with dose of 1.0×1014 ions/cm2. Carbon concentration profile obtained by secondary ion mass spectrometry measurement is in good agreement with the profile obtained by Monte Carlo simulation. The implanted carbon does not diffuse markedly with annealing at 900° C because the diffusion coefficient is below 4×10-16 cm2/ s for the ion-implanted carbon. Therefore, a shallow carrier concentration profile is formed after annealing. Activation efficiency is 17% at the surface (depth less than 0.47 µ m). However, this efficiency is as low as 4% in deeper regions. The lower activation efficiency in deeper regions is due to the suppression of activation by the precipitation of carbon after the annealing.

High-Speed Analog Integrated Circuits

Commercial markets for analog GaAs integrated circuits (ICs) can be divided into three segments: industrial, communications, and consumer. The application systems in each segment are instrumentation in industrial; microwave data link, very small aperture terminal (VSAT), and fiber optics in communications; and DBS, TV, and cellular radio in the consumer market. Application systems which are under development are summarized in Table 3.1.