Hideaki Sakaguchi

Studies on electrical performance and thermal stress of a silicon interposer with TSVs

The silicon interposer had been desired to have high Imput/Output (I/O) counts and fine wirings such as the global wiring of devices. High integration of several chips on the silicon interposer will realize a high performance silicon module same as System on Chip (SoC). We previously reported the fabrication process of TSVs and fine Cu wirings on a silicon interposer and the results of reliability test [1] [2]. Furthermore in order to reduce the stress at the 2nd level interconnection, we evaluated Trenched Air Gap (TAG)-TSV, which were fabricated by silicon etching around Cu-TSVs as a stress relief function [3]. In this reports, we focused on the properties of the silicon interposer. We evaluated the electrical performance of TAG-TSVs by measurement of S21 parameter. In addition, in order to obtain the stability of Power/Ground delivery we evaluated the fusing current of the fine Cu wiring and compared with that of Al spatter wiring. Furthermore we reported thermal stress measured with piezoresistive sensor which was mounted on the silicon interposer.