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Dive into the research topics where Hideharu Itatani is active.

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Featured researches published by Hideharu Itatani.


international electron devices meeting | 2009

Scalability of TiN/HfAlO/TiN MIM DRAM capacitor to 0.7-nm-EOT and beyond

Nobuyuki Mise; Osamu Tonomura; Tomoko Sekiguchi; Sadayoshi Horii; Hideharu Itatani; Arito Ogawa; Tatsuyuki Saito; Masanori Sakai; Yuji Takebayashi; Hirohisa Yamazaki; Kazuyoshi Torii

We have proposed guiding principle of material selection of electrode/dielectric combination for MIM DRAM capacitors by theoretically taking the tunneling barrier height into account. Accordingly, we found that phase-controlled HfO2 (HfAlO) with TiN electrode is promising. TiN/HfAlO/TiN MIM capacitors with an ultra-thin Al2O3 on the bottom TiN electrode were fabricated and an EOT of 0.7 nm with a leakage current of 80 nA/cm2 was successfully achieved.


IEEE Transactions on Electron Devices | 2010

Theoretical Screening of Candidate Materials for DRAM Capacitors and Experimental Demonstration of a Cubic-Hafnia MIM Capacitor

Nobuyuki Mise; Arito Ogawa; Osamu Tonomura; Tomoko Sekiguchi; Sadayoshi Horii; Hideharu Itatani; Tatsuyuki Saito; Masanori Sakai; Yuji Takebayashi; Hirohisa Yamazaki; Kazuyoshi Torii

To screen candidate materials for dynamic random-access memory capacitors, the tunneling probability at a constant equivalent oxide thickness (EOT) of metal-insulator-metal (MIM) capacitors was theoretically maximized according to a tradeoff between permittivity and band offset. As a result, it was found that cubic HfO2 with a TiN electrode is a promising candidate. TiN/Al-doped HfO2/TiN MIM capacitors were fabricated by inserting Al2O3 layers for phase control of HfO2 and for suppression of TiN oxidation. The fabricated capacitors exhibit leakage current of 80 nA/cm2 at 1 V and EOT of 0.7 nm. Moreover, the main leakage current was estimated to originate from oxygen vacancies.


Archive | 2003

Method for manufacturing semiconductor device, and substrate processing apparatus

Hideharu Itatani; Sadayoshi Horii; Masayuki Asai; Atsushi Sano


Archive | 2010

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SUBSTRATE PROCESSING SYSTEM

Arito Ogawa; Sadayoshi Horii; Taketoshi Sato; Hideharu Itatani; Nobuyuki Mise; Osamu Tonomura


Archive | 2010

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE, AND SUBSTRATE PROCESSING APPARATUS

Yuji Takebayashi; Hirohisa Yamazaki; Sadayoshi Horii; Hideharu Itatani; Arito Ogawa


Archive | 2011

SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND SUBSTRATE PROCESSING APPARATUS

Sadayoshi Horii; Arito Ogawa; Hideharu Itatani


Archive | 2006

Process for producing semiconductor device and substrate treatment apparatus

Hideharu Itatani; Sadayoshi Horii


Archive | 2001

Method of manufacturing a semiconductor

Masayuki Tsuneda; Hideharu Itatani


Archive | 2012

Method for manufacturing semiconductor device and method for processing substrate

Atsushi Sano; Hideharu Itatani; Mitsuro Tanabe


Archive | 2005

Semiconductor device manufacturing method and substrate processing equipment

Atsushi Sano; Sadayoshi Horii; Hideharu Itatani; Katsuhiko Yamamoto

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Sadayoshi Horii

Japan Advanced Institute of Science and Technology

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Sadayoshi Horii

Japan Advanced Institute of Science and Technology

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