Hideki Mutoh

A Global-Shutter CMOS Image Sensor With Readout Speed of 1-Tpixel/s Burst and 780-Mpixel/s Continuous

This paper presents a 400H×256V pixel CMOS image sensor including 128 on-chip memory/pixel with 1Tpixel/s in burst operation without cooling and 780Mpixel/s in continuous operation. To improve the read-out speed from the chip, a noise-reduction circuit in pixel and relay buffers is introduced.

An image sensor of 1 Mfps with photon counting sensitivity

For application of a video camera of 1,000,000 fps, developed by the authors in 2001, to electron microscopes and biological microscopes, a next generation ultra-high-speed image sensor with photon-counting sensitivity is proposed. It is based on three key technologies, i.e., (1) ISIS, the In-situ Storage Image Sensor for ultra-high-speed continuous image capturing, invented by the authors, (2) CCM, the Charge Carrier Multiplication by impact ionization, invented by Hynecek, and (3) conventional back-side illuminated CCD. It works not only for ultra-high-speed and ultra-high-sensitive image capturing, but also for image capturing under illumination of ultra-violet, visible, and near-infrared lights, soft X-ray and electron beam. The sensor is named the PC-ISIS, the photon-counting ISIS. The concept of the PC-ISIS is presented. Difficulties in the realization of the PC-ISIS are discussed.

Improved design of an ISIS for a video camera of 1,000,000 pps

The ISIS, In-situ Storage Image Sensor, may achieve the frame rate higher than 1,000,000 pps. Technical targets in development of the ISIS are listed up. A layout of the ISIS is presented, which covers the major targets, by employing slanted CCD storage and amplified CMOS readout. The layout has two different sets of orthogonal axis systems: one is mechanical and the other functional. Photodiodes, CCD registers and all the gates are designed parallel to the mechanical axis systems. The squares on which pixels are placed form the functional axis system. The axis systems are inclined to each other. To reproduce a moving image, at least fifty consecutive images are necessary for ten-second replay at 5 pps. The inclined design inlays the straight CCD storage registers for more than fifty images in the photo- receptive area of the sensor. The amplified CMOS readout circuits built in all the pixels eliminate line defects in reproduced images, which are inherent to CCD image sensors. FPN (Fixed Pattern Noise) introduced by the individual amplification is easily suppressed by digital post image processing, which is commonly employed in scientific and engineering applications. The yield rate is significantly improved by the elimination of the line defects.

Simulation-based development and characterization of a CCD architecture for 1 million frames per second

A new high-speed CCD-sensor, capable of capturing 103 consecutive images at a speed of 1 million frames per second, was developed by the authors. To reach this high frame-rate, 103 CCD-storage-cells are placed next to each image-pixel. Sensors utilizing this on-chip-memory-concept can be called In-situ Storage Image Sensor or ISIS. The ISIS is build in standard CCD-technology. To check if this technology could be used for an ISIS, a test sensor called ISIS V1 was designed first. The ISIS V1 is just a simple modification of an existing standard CCD-sensor and it is capable of taking 17 consecutive images. The new sensor called ISIS V2 is a dedicated design in the existing technology. It is equipped with storage CCD-cells that are also used in the standard CCD-sensor, large light-sensitive pixels, an overwriting mechanism to drain old image information and a CCD-switch to use a part of the storage cells also as vertical read-out registers. Nevertheless, the new parts in the architecture had to be simulated by a 3-D device simulator. Simulation results and characteristic parameters of the ISIS-CCD as well as applications of the camera are given.

ISIS with curved coupled CCD channels for a video camera of 1,000,000 pps

An improved design is presented for an ISIS, In-situ Storage Image Sensor, previously proposed by the authors for a high frame rate video camera of 1,000,000 pps. CCD channels of the sensor play dual roles for signal storage in an image capturing phase and for signal transfer in a read-out phase, which minimizes unutilized spaces on the light receptive area. The transfer direction is only vertical, which simplifies the structure of the sensor and provides better quality in reproduced images. An overwriting mechanism is built in, which facilitates synchronization of cease of the image capturing phase to the occurrence of a target event. The design is improved by coupling adjacent two CCD channels and two photodiodes, which provides wider spaces to place metal wires to increase rate of charge drive.