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Dive into the research topics where Hideki Tominaga is active.

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Featured researches published by Hideki Tominaga.


international solid-state circuits conference | 2012

A Global-Shutter CMOS Image Sensor With Readout Speed of 1-Tpixel/s Burst and 780-Mpixel/s Continuous

Yasuhisa Tochigi; Katsuhiko Hanzawa; Yuri Kato; Rihito Kuroda; Hideki Mutoh; Ryuta Hirose; Hideki Tominaga; Kenji Takubo; Yasushi Kondo; Shigetoshi Sugawa

This paper presents a 400H×256V pixel CMOS image sensor including 128 on-chip memory/pixel with 1Tpixel/s in burst operation without cooling and 780Mpixel/s in continuous operation. To improve the read-out speed from the chip, a noise-reduction circuit in pixel and relay buffers is introduced.


25th International Congress on High-Speed Photography and Photonics | 2003

An ultrahigh-speed video camera and its applications

Yasushi Kondo; Hiromasa Maruno; Hideki Tominaga; Hideki Soya; Takeharu Etoh

We have developed an ultra high-speed video camera announced by Etoh at the 24th ICHSPP. This new camera can capture 100 continuous images with a frame rate of up to 1,000,000 frames per second (fps). It comprises a new developed single-chip CCD image sensor called In-situ Storage Image Sensor (ISIS). The spatial resolution is 312 x 260 pixels and this high resolution is kept even at the maximum frame rate. This camera enables us to observe the fast phenomena, which could not be seen before. The principle of this system and some applications are introduced.


Proceedings of SPIE | 2014

Pixel structure with 10 nsec fully charge transfer time for the 20m frame per second burst CMOS image sensor

Ken Miyauchi; Tohru Takeda; Katsuhiko Hanzawa; Yasuhisa Tochigi; Shin Sakai; Rihito Kuroda; Hideki Tominaga; Ryuta Hirose; Kenji Takubo; Yasushi Kondo; S. Sugawa

In this paper, we demonstrate the technologies related to the pixel structure achieving the fully charge transfer time of less than 10 nsec for the 20M frame per second burst CMOS image sensor. In this image sensor, the size of the photodiode (PD) is 30.0 μmH x 21.3 μmV in the 32.0 μmH x 32.0 μmV pixel. In the pixel, the floating diffusion (FD) and the transfer-gate-electrode (TG) are placed at the bottom center of the PD. The n-layer for the PD consists of the semicircular regions centered on the FD and the sector-shaped portions extending from the edges of the semicircular regions. To generate an electric field greater than the average of 400 V/cm toward the FD direction in the entire PD region, the n-layer width of the sector-shaped portions becomes narrower from the proximal-end to the distal-end. By using the PD structure, which includes the above mentioned n-layer shape and the PD dopant profile with the condition of three times n-type dopant implantation, we achieved to collect 96 % of the charges generated in the PD at the FD within 10 nsec. An ultra-high speed CMOS image sensor with the abovementioned pixel structure has been fabricated. Through the experiments, we confirmed three key characteristics as follows; the image lag was below the measurement limit, the electron transit time in the PD was less than 10 nsec, and the entire PD region had equivalent sensitivity.


Archive | 2008

Solid-state image sensor and drive method for the same

Shigetoshi Sugawa; Yasushi Kondo; Hideki Tominaga


Archive | 2004

Two-color radiation thermometer

Hideki Tominaga; Kunihiko Ohkubo; Yasushi Kondo


Archive | 2004

Photographic apparatus and synchronous photography timing controller

Hideki Tominaga; Hideki Soya; Yasushi Kondo; Takeharu Etoh


Archive | 2008

Solid-state image sensor and imaging device

Shigetoshi Sugawa; Yasushi Kondo; Hideki Tominaga


Archive | 2003

PHOTOGRAPHING EQUIPMENT AND SYNCHRONOUS PHOTOGRAPHIC TIMING CONTROLLER

Koji Eto; Yasushi Kondo; Hideki Soya; Hideki Tominaga; 秀樹 冨永; 秀樹 征矢; 剛治 江藤; 泰志 近藤


Archive | 2008

Solid-state image sensor and method for producing the same

Shigetoshi Sugawa; Yasushi Kondo; Hideki Tominaga


Archive | 2005

Optical image information detecting apparatus

Hideki Tominaga

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