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Featured researches published by Hidemoto Tomita.


international symposium on power semiconductor devices and ic's | 2011

Wide-voltage SOI-BiCDMOS technology for high-temperature automotive applications

Hidemoto Tomita; Hiroomi Eguchi; Shinya Kijima; Norihiro Honda; Tetsuya Yamada; Hideo Yamawaki; Hirofumi Aoki; Kimimori Hamada

This paper describes a new wide-voltage SOI-BiCDMOS technology for high-temperature automotive applications. This technology is capable of integrating 35V, 60V, and 80V Nch and Pch LDMOS, 35V BJT, and 6V CMOS devices on a single chip. The devices are completely isolated dielectrically using both deep trench isolation (DTI) and a buried oxide (BOX) layer in a silicon-on-insulator (SOI) wafer for stable operation at high temperatures up to 175°C. The devices were developed using a 0.35μm process. In particular, the LDMOS devices have achieved competitive levels of low Ron∗ A and good SOA.


ieee soi 3d subthreshold microelectronics technology unified conference | 2014

An SOI based integrated gate-drivers for automotive application

Ken Toshiyuki; Yoshihiko Hiya; Kazuya Kinoshita; Hidemoto Tomita; Norishige Hoshikawa

This paper presents our recent development of an ASIC for automotive application. With the progress of automotive electronics, there is increasing need for high temperature and high voltage operation. The ASIC for the EPS applications was integrated with a boost gate driver, three-phase inverter drivers and their components. The ASIC was designed and fabricated using SOI-BiCD process which can operate at the maximum voltage of 80V and at temperature from -40°C to 175°C.


The Japan Society of Applied Physics | 2017

Evaluation of Interface State Distributions in LP-CVD SiO 2 /GaN by Deep-Level

Hiroyuki Ueda; Tomohiko Mori; Masato Kodama; Yoshitaka Nagasato; Hidemoto Tomita; Kozo Kato


Archive | 2017

NITRIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

Yoshitaka Nagasato; Hidemoto Tomita; Masakazu Kanechika


Archive | 2016

***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST***Semiconductor device and method of manufacturing the same

Masakazu Kanechika; Hiroyuki Ueda; Hidemoto Tomita


Archive | 2016

Nitridhalbleitervorrichtung und verfahren zur herstellung derselben Nitride semiconductor device and method for manufacturing the same

Yoshitaka Nagasato; Hidemoto Tomita; Masakazu Kanechika


Archive | 2016

Nitride semiconductor device and method for manufacturing the same

Yoshitaka Nagasato; Hidemoto Tomita; Masakazu Kanechika


Archive | 2015

Halbleitervorrichtung und Verfahren zum Herstellen derselben Semiconductor device and method of manufacturing the same

Masakazu Kanechika; Hiroyuki Ueda; Hidemoto Tomita


Archive | 2015

Mit einem Nitrid-Halbleitersubstrat ausgebildete Schottky-Diode

Hidemoto Tomita; Masakazu Kanechika; Hiroyuki Ueda; Koichi Nishikawa


Archive | 2015

Mit einem Nitrid-Halbleitersubstrat ausgebildete Schottky-Diode With a nitride semiconductor substrate formed Schottky diode

Hidemoto Tomita; Masakazu Kanechika; Hiroyuki Ueda; Koichi Nishikawa

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