Hideya Akashi
Hitachi
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Publication
Featured researches published by Hideya Akashi.
international parallel processing symposium | 1997
Yoshiko Yasuda; Hiroaki Fujii; Hideya Akashi; Yasuhiro Inagami; Teruo Tanaka; Junji Nakagoshi; Hideo Wada; Tsutomu Sumimoto
We have developed a hardware detour path selection facility for the Hitachi SR2201 parallel computer, which uses a multi-dimensional crossbar as an inter-processor network to ensure operating efficiency and high reliability when a part of the network is faulty. When this hardware facility is used, packets are transmitted to their destination along alternative paths to avoid the fault. However, changing the routing may cause deadlock. This paper describes a deadlock-free fault-tolerant routing scheme that can be used by the detour path selection facility to avoid deadlock, and its implementation for the SR2201.
Archive | 2000
Tsuyoshi Tanaka; Hideya Akashi; Yuji Tsushima; Keitaro Uehara; Naoki Hamanaka; Toru Shonai
Archive | 1995
Naonobu Sukegawa; Tshiaki Tarui; Hiroaki Fujii; Hideya Akashi
Archive | 1998
Toshiaki Tarui; Koichi Okazawa; Yasuyuki Okada; Toru Shonai; Toshio Okochi; Hideya Akashi
Archive | 2003
Yoshiko Yasuda; Naoki Hamanaka; Toru Shonai; Hideya Akashi; Yuji Tsushima; Keitaro Uehara
Archive | 2002
Hideya Akashi; Keitaro Uehara; Tsuyoshi Tanaka
international parallel processing symposium | 1997
Hiroaki Fujii; Yoshiko Yasuda; Hideya Akashi; Yasuhiro Inagami; Makoto Koga; Osamu Ishihara; Masamori Kashiyama; Hideo Wada; Tsutomu Sumimoto
Archive | 1999
Hideya Akashi; Toshio Okochi; Toru Shonai; Masamori Kashiyama
Archive | 1997
Hiroaki Fujii; Tadaaki Isobe; Makoto Koga; Hideya Akashi
Archive | 2000
Tadayuki Sakakibara; Isao Ohara; Hideya Akashi; Yuji Tsushima; Satoshi Muraoka
