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Dive into the research topics where Hirohito Okuda is active.

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Featured researches published by Hirohito Okuda.


Pattern Recognition | 2005

Successive pattern classification based on test feature classifier and its application to defect image classification

Yukinobu Sakata; Shuni’chi Kaneko; Yuji Takagi; Hirohito Okuda

A novel successive learning algorithm based on a Test Feature Classifier is proposed for efficient handling of sequentially provided training data. The fundamental characteristics of the successive learning are considered. In the learning, after recognition of a set of unknown data by a classifier, they are fed into the classifier in order to obtain a modified performance. An efficient algorithm is proposed for the incremental definition of prime tests which are irreducible combinations of features and capable of classifying training patterns into correct classes. Four strategies for addition of training patterns are investigated with respect to their precision and performance using real pattern data. A real-world problem of classification of defects on wafer images has been dealt with by the proposed classifier, obtaining excellent performance even through efficient addition strategies.


advanced semiconductor manufacturing conference | 2006

Robust Defect Detection System Using Double Reference Image Averaging for High Throughput SEM Inspection Tool

Takashi Hiroi; Hirohito Okuda

This paper reports a defect detection system for a high throughput SEM inspection tool. Although the system has a big advantage compared to optical tools, that is, the ability to detect smaller defects and voltage contrast defects, the cost of ownership (COO) remains high. To enhance COO, throughput enhancement is the critical issue. A larger beam current results in lower image noise and higher throughput. At the same time, the larger the beam current, the lower is the resolution. We suggest a robust defect detection system as a solution to the trade-off between resolution and throughput. The main inspection targets are the voltage contrast (VC) defects on the memory matte. The system judges defects by subtracting a detected image from a reference image, and then determining the defective portion as a larger difference than the pre-determined threshold in the subtracted image. If the noise variation for the two images is a in both cases, the noise in the subtracted image is 1.4 sigma (= radic(sigma2 + sigma2)). We have developed a double reference image averaging (DRIA) system which improves the noise in the reference image by averaging repetitive patterns on the memory matte and noise variation on subtracted image is enhanced to a sigma (= radic(sigma2 + sigma2 )) ideally. This enhancement is equivalent to a two times higher throughput than conventional systems. We also improved the electron beam optics and show that our system throughput is 400 Mpixels per second (pps), which is four times faster than previous systems


Metrology, inspection, and process control for microlithography. Conference | 2006

Robust defect detection method using reference image averaging for high-throughput SEM wafer pattern inspection system

Hirohito Okuda; Takashi Hiroi

A wafer pattern inspection system using scanning electron microscopy (SEM) is desirable because electron probing makes it possible to inspect not only surface defects, but also internal electric properties. However, the detection rate of SEM is typically about 100 mega pixels per second (Mpps) due to the effect of shot noise on a signal caused by improving the detection rate. To reduce the cost of ownership of the inspection system, improving throughput of SEM is imperative. Unfortunately, the detection rate remains at 200 Mpps due to physical limitations of the resolution caused by the Coulomb effect and the increasing effect of shot noise. To overcome these limitations, projection electron microscopy systems[1,2] have been proposed. We created a novel image processing method that reliably detects defects images obtained at a 400 Mpps detection rate without increasing the beam current. By using the periodicity of circuit patterns in a memory mat area, the method generates the reference image of a high signal-to-noise ratio by averaging the periodic pattern and detects defects by comparing a defect image with the generated reference image. The theoretical study on the signal-to-noise ratio and the experimental results on the defect detection performance for various sizes of artificial pattern defects are presented.


Archive | 2003

Defect inspection method

Toshifumi Honda; Hirohito Okuda


Archive | 2006

Defect Inspection Apparatus and Defect Inspection Method

Hirohito Okuda; Yuji Takagi; Toshifumi Honda


Archive | 2004

Method of classifying defects

Atsushi Miyamoto; Hirohito Okuda; Toshifumi Honda; Yuji Takagi; Takashi Hiroi


Archive | 2004

Defect classification method

Toshifumi Honda; Atsushi Miyamoto; Hirohito Okuda


Archive | 2005

Method of reviewing detected defects

Toshifumi Honda; Yuji Takagi; Hirohito Okuda


Archive | 2002

Method and system for inspecting electronic circuit pattern

Hirohito Okuda; Yuji Takagi; Masahiro Watanabe; Shunji Maeda; Minori Noguchi; Yoshimasa Ooshima; Makoto Ono


Archive | 2003

Method and its apparatus for classifying defects

Hirohito Okuda; Toshifumi Honda; Yuji Takagi; Atsushi Miyamoto

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