Hiromasa Hoko

Application of sputtered SiO2 insulator to Nb/AlOx/Nb Josephson junctions

Sputtered SiO2 films were applied as an insulator in all‐refractory Josephson circuits. The sputtered SiO2 exhibited excellent insulating characteristics with respect to infrared absorption, breakdown voltage, and step coverage. The sputtered SiO2 was employed in the actual fabrication of Nb/AlOx/Nb Josephson circuits, and no deterioration in the junction quality or the critical current density was observed. An 8Kbit memory cell array was fabricated, and perfect chips with no failures were obtained. In these chips, the integrity of the insulation and continuity was verified for four‐level Nb electrodes. This indicates the availability of sputtered SiO2 in all‐refractory Josephson integrated circuits.

Tantalum nitride films for the absorber material of refractive-type EUVL mask

Tantalum nitride (TaxN) films were evaluated for use as the absorber material of masks for extreme ultraviolet lithography (EUVL). TaxN films deposited by DC sputtering using an Ar+N2 gas mixture had a low stress of less than 300 MPa, an amorphous-like structure, and a low deep ultraviolet (DUV) reflectivity. This film provides a DUV contrast of 30% with respect to the Mo/Si multilayer whose top is on Si layer. A TaxN film deposited using a Xe+N2 gas mixture was found to be better in the following ways: the stress was below 100 MPa, the change in stress was below 30 MPa, and the density was more than 1 g/cm3 higher. Furthermore, treating the surface of TaxN film with O2 plasma or sputtering a TaxO film on it using an Ar+O2 gas mixture improved the DUV contrast because the resulting surface has a lower DUV reflectivity than TaxN film. These results indicate that TaxN film is one of the most suitable materials for the absorber of EUVL masks.

Smooth low-stress sputtered tantalum and tantalum alloy films for the absorber material of reflective-type EUVL

Tantalum (Ta) and Ta-alloy films were evaluated for use as the absorber material of masks for extreme ultraviolet lithography (EUVL). It was found that Ta film with a stress below 100 MPa, a surface roughness of less than 1 nm rms, a film density of over 14 g/cm3, and a deposition rate of more than 50 nm/min could be obtained by DC sputtering with Ar gas. Experiments on delineating mask patterns in this film by using dry etching revealed that 250-nm line-and-space patterns could be formed. The alloys evaluated were TaGe and TaN. These films were found to have some better properties than Ta film, for example, less stress, a smaller change in stress, and a smoother surface. This is confirmed to be due to the fact that the alloy films are amorphous. Of particular note is that TaN film has a lower deep ultraviolet (DUV) reflectivity than either Ta or TaGe, thus providing higher contrast between the underlying multilayer and the absorber patterns of an EUVL mask during DUV inspection. However, TaN has a lower density than the other two films. So, our current results indicate that using Ta or TaGe for the bulk absorber material and covering that with a thin layer of TaN is a promising way to obtain the film properties required for EUVL mask patterns, including film density and DUV inspection capability.

CHARACTERIZATION OF (Bi,Nd)4Ti3O12/HfO2/p-TYPE Si STRUCTURES FOR MFIS-FeRAM APPLICATION

ABSTRACT Metal-Ferroelectric-Insulator-Semiconductor (MFIS)-FET using (Bi, Nd)4Ti3O12 (BNT)/HfO2/p-type Si structure was fabricated and characterized. HfO2 and BNT thin films were formed by metalorganic chemical vapor deposition (MOCVD) and chemical solution deposition (CSD) method, respectively. The p-type Si substrate was used to take advantage of the large ON current of n-channel FET. The fabricated MFIS-FET showed a good ID-VD, characteristics. The ID-VG curve showed the memory window width of 0.8 V. The relation between the memory window and sweep voltage was investigated, and it appeared that the applied voltage influenced to both polarization switching and charge injection.

Evaluation of cleaning techniques for EUVL mask by using a highly sensitive particle detection system

Extreme ultraviolet lithography (EUVL) is one of the promising candidates for patterning process to achieve technology nodes of 50 nm or below. In order to fabricate low-defect EUVL mask blank, two kinds of cleaning technique have to be developed. One is for the substrate before Mo/Si multi-layer coating, another is for finished masks. Particles on the substrate induce phase defects by altering the periodicity of the multi-layer. This makes it essential to remove particles from the substrate. Since EUV light is not expected to transmit materials for a pellicle, the mask of EUVL will be without a pellicle. The mask without a pellicle needs to keep the surface clean, because particles on the mask are easily focused on the wafers. ASET has developed a supersonic hydrocleaning (SHC) technique, which uses twin fluid jet nozzles designed for supersonic flow. Until now, the efficiency with which SHC removes particles below 100 nm in size was unclear because of the resolution limit of current optical inspection tool. In this paper, the particle removal efficiency at that level was assessed using a highly sensitive particle inspection system co-developed by the ASET SPC Laboratory and Hamamatsu Photonics K.K.

Characteristics of Ru as a buffer layer or an etch stopper for EUVL mask patterning

Abstract The feasibility of using Ru as a buffer layer or an etch stopper in EUVL masks was examined. Ru exhibits a high etching selectivity both to Si (for Ru buffer layer) and SiO 2 (for Ru etch stopper). This can lead to a simple patterning process that does not damage the multilayer. An additional advantage of Ru as a buffer layer is its slow etch rate by a focused ion beam for repair buffer. Furthermore, the use of Ru improves the repair inspection contrast. A Ru layer exhibits very good properties both as a buffer layer and an etch stopper for EUVL mask patterning.

Transmission Electron Microscopy Observation and Simulation Analysis of Defect-Smoothing Effect of Molybdenum/Silicon Multilayer Coating for Extreme Ultraviolet Lithography Masks

In extreme ultraviolet (EUV) lithography (EUVL), EUV light is reflected from a mask coated with a molybdenum/silicon (Mo/Si) multilayer. Cross-sectional transmission electron microscopy (TEM) images were taken of Mo/Si multilayers deposited on a rough surface of silicon dioxide, which is the alternative material of the real glass-reticle, to analyze the correlation between the roughness of the underlying surface and the variation in the periodicity of a multilayer, which is partly responsible for phase error. It was found that both divots and bumps on the underlying surface which are 3–5 nm in height were smoothed out after the deposition of the first few bilayers of a Mo/Si multilayer with a periodicity of 6.9 nm. Simulation studies are also conducted to investigate the mechanism of the above-mentioned smoothing effect. The results of the simulations indicate that the partly re-sputtered Mo and Si atoms, which are probably caused by the elastically scattered argon atoms from the target, are one of the reasons for above-mentioned smoothing effect.

Characteristics of the Ru buffer layer for EUVL mask patterning

The characteristics of Ru film were examined to determine its suitability as a buffer layer for EUV mask patterning. When etched in an O2/Cl2 gas mixture with a high Cl2 content at a low total gas flow rate, Ru exhibited a high etching selectivity with respect to a-Si, the otp layer of a Mo/Si multilayer mirror. This could enable use of a simpler mask patterning process without any damage to the multilayer. The patterning of a mask with a TaN absorber layer and a Ru buffer layer was demonstrated. Etching the TaN with an Ar/Cl2 gas mixture yielded a high etching selectivity with respect to Ru of over 30:1. In addition, the use of Ru rather than SiO2 for the buffer layer improved the DUV inspection contrast of TaN mask patterns before and after buffer layer etching. Finally, Ru is etched more slowly than SiO2 by a focused ion beam, which makes it more suitable as a sacrificial layer during repair.

Process scheme for removing buffer layer on multilayer for EUVL mask

In the fabrication of masks for EUVL, a combination of dry and wet etching was used to remove the SiO2 buffer layer. This technique greatly improves the pattern quality, yielding re-entrant shaped mask patterns with a steep SiO2 sidewall. Under proper conditions, etching results in the base of the sidewall being recessed around 5 nm from the edge of the Ta pattern. The strength of hydrofluoric acid (HF) solution was set to 3.3 percent to allow good control of the etching rate. A combination of dry and wet etching is an effective way to remove the SiO2 buffer layer because it can compensate for a variation of as much as 7.6 percent in the thickness of the SiO2 film before etching.

Vertically integrated Josephson circuits with stacked Nb/Alo x /Nb junctions

Since Josephson circuit has a multi-layered wiring structure, planarization is necessary for fabricating integrated Josephson circuits. We used bias-sputtered SiO2films as the insulators in Josephson circuits for planarization. By using with bias-sputtered SiO2films, the surface on the junctions becomes smooth. The planarized junctions show the good I-V characteristics such as a gap voltage of 2.9 mV and a Vm of over 50 mV. In addition, we stacked another Josephson junction above the planarized junction. We obtained a high quality junction with the same gap voltage and Vm as the lower junctions. Bias-sputtered SiO2films are effective for the planarization of Josephson circuits, and makes it possible to fabricate three-dimensional integrated circuits.