Hiroo Sekiya

FM/PWM control scheme in class DE inverter

This paper presents a new control scheme for a Class DE inverter, that is, frequency modulation/pulsewidth modulation (FM/PWM) control. Further, the FM/PWM controlled Class DE inverter is analyzed and we clarify performance characteristics. Since the FM/PWM controlled inverter has two control parameters, namely, the switching frequency and the switch-on duty ratio, it has one more degree of freedom for the control than the inverter with the conventional control scheme. The increased degree of freedom is used to minimize the switching losses. Therefore, it is possible to control the output power with high power-conversion efficiency for wide-range control. Carrying out the circuit experiments, we confirm that the experimental results agree well with the theoretical predictions quantitatively. For example, the proposed controlled inverter can control the output voltage from 56% to 191% of the optimum one, which is designed for 1.8 W at 1.0 MHz, with maintaining over 90% power-conversion efficiency.

Computation of design values for Class E amplifiers without using waveform equations

This paper presents a novel design procedure for Class E amplifiers without using waveform equations. By the proposed design procedure, Class E amplifiers can be designed regardless of the Q factor of resonant circuit, existence of the switch on resistor, and so on. The proposed design procedure requires only circuit equations and design specifications. All design procedures reported until now require deriving waveform equations which requires a lot of work. The benefits of the proposed design procedure is that it is to deriving waveform equations is no longer necessary. When the circuit equations are obtained, the other procedures for computation of design values are carried out with aid of computer. Therefore, we can design Class E amplifier more easily than the conventional design procedure. The authors design Class E amplifiers by using the proposed design procedures and carry out the circuit experiments, and find that the experimental results agree with calculation results, and show the validity of the proposed design procedure.

Design of Class-E Amplifier With MOSFET Linear Gate-to-Drain and Nonlinear Drain-to-Source Capacitances

This paper presents expressions for the waveforms and design equations to satisfy the ZVS/ZDS conditions in the class-E power amplifier, taking into account the MOSFET gate-to-drain linear parasitic capacitance and the drain-to-source nonlinear parasitic capacitance. Expressions are given for power output capability and power conversion efficiency. Design examples are presented along with the PSpice-simulation and experimental waveforms at 2.3 W output power and 4 MHz operating frequency. It is shown from the expressions that the slope of the voltage across the MOSFET gate-to-drain parasitic capacitance during the switch-off state affects the switch-voltage waveform. Therefore, it is necessary to consider the MOSFET gate-to-drain capacitance for achieving the class-E ZVS/ZDS conditions. As a result, the power output capability and the power conversion efficiency are also affected by the MOSFET gate-to-drain capacitance. The waveforms obtained from PSpice simulations and circuit experiments showed the quantitative agreements with the theoretical predictions, which verify the expressions given in this paper.

Design of AC resonant inductors using area product method

There are no well-established criteria for selecting the core for the design of resonant inductors. This paper presents new expressions of the area product for resonant inductors. By using proposed expressions, the area-product value can be calculated from loaded-quality factor of a resonant circuit, output power, and operating frequency assuming the window utilization factor and the maximum flax density. The area-product value expressed in terms of the loaded-quality factor is a good criterion for selecting the core. The design examples are given for single-wire winding and multiple-strand winding with a gapped core taking into account skin, proximity, and fringing effects.

Analysis of Class DE Amplifier With Nonlinear Shunt Capacitances at Any Grading Coefficient for High

This paper gives analytical expressions for the class disruptive effect (DE) amplifier with nonlinear shunt capacitances at any grading coefficient m of the MOSFET body junction diode at a high value of the loaded quality factor Q of the output resonant circuit, zero equivalent series resistance of all the components, and switch-on duty ratio D=0.25. No external shunt capacitance is used in the analysis of the class DE amplifier. The grading coefficient determines the degree of nonlinearity of the MOSFET shunt capacitances. When the grading coefficient is different from the design specifications, the waveforms of the switch voltages do not satisfy the class E switching conditions, reducing the power conversion efficiency. Therefore, the grading coefficient m is an important parameter to satisfy the class E switching conditions. It is shown analytically that the dc supply voltage and current are always proportional to the amplitude of the output voltage and current. The output power capability is never affected by any nonlinearity of the shunt capacitances. We obtain analytical design equations, which are validated by PSPICE simulations and laboratory experiments considered with the gate-drain capacitance effect.

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This paper presents novel design procedures for class E switching circuits allowing implicit circuit equations. Because of the allowance, circuit simulators can be used in the proposed design procedures. Moreover, the proposed design procedures also allow any conditions considered until now. The proposed design algorithms are implemented by using PSpice and OPTIMUS. This paper shows the design examples of two kinds of class E switching circuits. In particular, the design example of the class E oscillator shows the benefit of the proposed design procedure eminently, i.e., it is unnecessary to make an equivalent model of the semiconductor devices for the design. These design examples show the validity and effectiveness of the proposed design procedures.

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It is desirable for alarm packets to be forwarded to the sink as quickly as possible in wireless sensor networks. In this paper, we initially analyze the theory of the relationships between network configurations and network lifetime as well as transmission delay. Then, we propose an approximate optimization approach to minimize the end-to-end delay with a reduced complexity of configuration under the condition that the network lifetime remains greater than the specified target value. A local forwarding approach named Fast data collection for nodes Far away from the sink and slow data collection for nodes Close to the Sink (FFSC) is proposed. This approach is energy efficient. Moreover, it can further reduce the end-to-end delay. Both the comprehensive theoretical analysis and the experimental results indicate that the performance of FFSC is better than the methods proposed by previous studies. Relative to the direct forwarding strategy, the FFSC approach can reduce the delay by 7.56%-23.16% and increase the lifetime by more than 25%. It can also increase the energy efficiency as much as 18.99%. Relative to the single fixed threshold strategy, the FFSC approach can reduce the delay by 4.16%-9.79% and increase the energy efficiency by 19.28% while still guaranteeing the same lifetime as those previous methods.

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In smart Industrial Wireless Sensor Networks (IWSNs), sensor nodes usually adopt a programmable technology. These smart devices can obtain new or special functions by reprogramming: they upgrade their soft systems through receiving new version of program codes. If sensor nodes need to be upgraded, the sink node will propagate program code packets to them through “one-to-many” broadcasting, and therefore new capabilities can be obtained, forming the so-called Software Defined Network (SDN). However, due to the high volume of code packet, the constraint energy of sensor node, and the unreliable link quality of wireless network, rapidly broadcasting the code packets to all nodes in network can be a challenge issue. In this paper, a novel Energy-efficient Broadcast scheme with adjustable broadcasting radius is proposed aiming to improve the performance of network upgrade. In our scheme, the nonhotspots sensor nodes take full advantage of their residual energy caused in data collection period to improve the packet reception probability and reduce the broadcasting delay of code packet transmission by enlarging the broadcasting radius, that is, the transmitting power. The theoretical analyses and experimental results show that, compared with previous work, our approach can averagely reduce the Network Upgrade Delay (NUD) by 14.8%–45.2% and simultaneously increase the reliability without harming the lifetime of network.

% Duty Ratio

In this paper, a phase control scheme for Class-DE-E dc-dc converter is proposed and its performance is clarified. The proposed circuit is composed of phase-controlled Class-DE inverter and Class-E rectifier. The proposed circuit achieves the fixed frequency control without frequency harmonics lower than the switching frequency. Moreover, it is possible to achieve the continuous control in a wide range of the line and load variations. The output voltage decreases in proportion to the increase of the phase shift. The proposed converter keeps the advantages of Class-DE-E dc-dc converter, namely, a high power conversion efficiency under a high-frequency operation and low switch-voltage stress. Especially, high power conversion efficiency can be kept for narrow range control. We present numerical calculations for the design and the numerical analyses to clarify the characteristics of the proposed control. By carrying out circuit experiments, we show a quantitative similarity between the numerical predictions and the experimental results. In our experiments, the measured efficiency is over 84% with 2.5 W output power for 1.0-MHz operating frequency at the nominal operation. Moreover, the output voltage is regulated from 100% to 39%, keeping over 57% power conversion efficiency by using the proposed control scheme.

Design Procedure for Class E Switching Circuits Allowing Implicit Circuit Equations

This paper presents analytical expressions for the class-E power amplifier with a shunt inductor for satisfying the subnominal condition and 50% duty ratio. The subnominal condition means that only the zero-current switching condition (ZCS) is achieved, though the nominal conditions mean that both the ZCS and zero-current derivative switching (ZCDS) are satisfied. The design values for achieving the subnominal condition are expressed as a function of the phase shift between the input and output voltages. The class-E amplifier with subnominal condition increases one design degree of freedom compared with that with the nominal conditions. Because of the increase in the design degree of freedom, one more relationship can be specified as a design specification. It is shown analytically that the dc-supply voltage and the current are always proportional to the amplitude of the output voltage and the current as a function of the phase shift. Additionally, the output power capability is affected by the phase shift, and the peak switch voltage has influence on the phase shift as well. This paper gives a circuit design example based on our proposed design expression by specifying the peak switch voltage instead of the ZCDS condition. The measurement and PSpice simulation results agree with the analytical expressions quantitatively, which show the validity of our analytical expressions.