Tadashi Suetsugu

Class DE high-efficiency tuned power amplifier

A new type of high-frequency high-efficiency tuned power amplifier is proposed, analyzed and verified experimentally. It is called a Class DE tuned power amplifier because its circuit topology is very similar to that of the conventional Class D amplifier and the operation of each switch satisfies the Class E switching conditions when the switch turns on. Class E switching conditions are achieved by providing a shunt capacitor for each switch and realizing a dead-time between the switch-on-times. These conditions take into account that the amplifier operates at higher frequency than the conventional Class D amplifier. The switch voltage stress has kept on the same level to the conventional Class D amplifier. The measured efficiency was over 96% at 1 MHz.

Analysis and design of class E amplifier with shunt capacitance composed of nonlinear and linear capacitances

The Class E amplifier requires exact shunt capacitance to achieve optimum operation. Most Class E amplifiers are usually constructed by adding an external capacitor to the output capacitance of the power transistor in order to obtain the total required shunt capacitance. The output capacitance of the power transistor is nonlinear and the external capacitance is linear. Therefore, neither design equations for linear shunt capacitance nor the design equations for nonlinear shunt capacitance can be used in most designs, especially when the two are comparable. This paper presents an analysis and a design procedure for the Class E amplifier with a shunt capacitance composed of both a transistor nonlinear output capacitance and a linear external capacitance for the duty cycle D=0.5. Because the design equations do not have analytical forms, this paper provides a table and figures, which show results of numerical analysis. The Class E amplifier can be designed using these table and figures. A design example is given to illustrate the design procedure. Simulation results of the example circuit with PSpice and experimental results are presented to verify the theoretical results.

Comparison of class-E amplifier with nonlinear and linear shunt capacitance

Comparison of various parameters of the class-E amplifier with nonlinear and linear shunt capacitance is given. A concept of an equivalent linear shunt capacitance is introduced. The following parameters are compared for the amplifiers with nonlinear and linear shunt capacitance at the duty cycle D=0.5: series reactance, peak switch voltage, and power capability. A design procedure for the class-E amplifier with a nonlinear shunt capacitance is presented. Simulation of the designed class-E amplifier is performed to verify the design equations that ensure zero-voltage-switching operation.

Design procedure of class-E amplifier for off-nominal operation at 50% duty ratio

Design equations for satisfying the off-nominal operating condition [i.e., only the zero-voltage switching (ZVS) condition] of the Class-E amplifier with a linear shunt capacitance at a duty ratio D=0.5 are derived. A new parameter s (V/s), called the slope of switch voltage when the switch turns on is introduced to obtain an image of the distance from the nominal conditions. By examining off-nominal Class-E operation degree of the design freedom of the Class-E amplifier increases by one. In addition various amplifier parameters such as operating frequency, output power, and load resistance range can be set as design specifications. For example, the peak switch voltage and switch current can be taken into account in the design procedure. Examples of a design procedure of the Class-E amplifier for off-nominal operation are given. The theoretical results were verified with PSpice simulation and experiments.

Design of Class-E Amplifier With MOSFET Linear Gate-to-Drain and Nonlinear Drain-to-Source Capacitances

This paper presents expressions for the waveforms and design equations to satisfy the ZVS/ZDS conditions in the class-E power amplifier, taking into account the MOSFET gate-to-drain linear parasitic capacitance and the drain-to-source nonlinear parasitic capacitance. Expressions are given for power output capability and power conversion efficiency. Design examples are presented along with the PSpice-simulation and experimental waveforms at 2.3 W output power and 4 MHz operating frequency. It is shown from the expressions that the slope of the voltage across the MOSFET gate-to-drain parasitic capacitance during the switch-off state affects the switch-voltage waveform. Therefore, it is necessary to consider the MOSFET gate-to-drain capacitance for achieving the class-E ZVS/ZDS conditions. As a result, the power output capability and the power conversion efficiency are also affected by the MOSFET gate-to-drain capacitance. The waveforms obtained from PSpice simulations and circuit experiments showed the quantitative agreements with the theoretical predictions, which verify the expressions given in this paper.

Off-Nominal Operation of Class-E Amplifier at Any Duty Ratio

Design equations for satisfying the suboptimum operating condition, i.e., only the zero-voltage switching (ZVS) condition, of a class-E amplifier with a linear shunt capacitance at any duty ratio are derived. By exploiting the suboptimum class-E operation, various amplifier parameters such as operating frequency, output power, load resistance, and component values can vary, while the ZVS operation and high efficiency can be achieved. An example of a design procedure of the class-E amplifier is given. The theoretical results were verified with PSpice simulation and an experiment.

Class DE current-source parallel resonant inverter

This paper introduces a Class DE current-source parallel resonant inverter, along with its design procedure and experimental results. This circuit offers several desirable features. First, the proposed circuit lacks harmonic components of input current over the voltage-source inverters. Second, the source pin of the MOSFET is directly connected to the ground, so that it is not necessary to use a complicated gate-drive circuit. Third, by maintaining zero-current switching, power loss by the parasitic inductor at turn-off decreases. The measured efficiency is over 90% at the output power of 3.5 W and the operating frequency of 0.5 MHz.

Steady-state behavior of class E amplifier outside designed conditions

Explicit expressions for steady-state behavior of the class E amplifier are derived. These equations are useful to predict the behavior of the class E amplifier outside the designed conditions. It is shown how the switch voltage and current waveforms change when duty cycle, frequency, or load resistance deviates from the designed values corresponding to zero-voltage switching/zero-derivative switching conditions. The theory was compared with PSpice simulation.

Analysis of phase-controlled resonant DC-AC inverters with class E amplifier and frequency multipliers

This paper presents a minute analysis and experimental results of phase-controlled resonant DC-AC inverters with class E amplifiers and frequency multipliers. The circuit is composed of two identical class E amplifiers or frequency multipliers, which are used as DC-AC inverters and connected in parallel. The two inverters are driven at the same switching frequency, and the overall output power of the circuit can be controlled by varying the phase shift between the drive voltages of the two inverters. The circuit can regulate the output voltage at a constant switching frequency. The measured efficiency was over 93% at an output power of 0.98 W and a switching frequency of 0.5 MHz for both of the inverters with amplifier and frequency doubler.

Maximum Operating Frequency of Class-E Amplifier at Any Duty Ratio

This paper shows that the maximum operating frequency of the class-E power amplifier depends on the transistor duty ratio. The maximum operating frequency increases as the duty ratio decreases under zero-voltage switching and zero-derivative switching conditions at fixed values of the output power, dc supply voltage, and shunt capacitance.