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Featured researches published by Shinsaku Mori.


theory and application of cryptographic techniques | 1991

A secret key cryptosystem by iterating a chaotic map

Toshiki Habutsu; Yoshifumi Nishio; Iwao Sasase; Shinsaku Mori

Chaos is introduced to cryptology. As an example of the applications, a secret key cryptosystem by iterating a one dimensional chaotic map is proposed. This system is based on the characteristics of chaos, which are sensitivity of parameters, sensitivity of initial points, and randomness of sequences obtained by iterating a chaotic map. A ciphertext is obtained by the iteration of a inverse chaotic map from an initial point, which denotes a plaintext. If the times of the iteration is large enough, the randomness of the encryption and the decryption function is so large that attackers cannot break this cryptosystem by statistic characteristics. In addition to the security of the statistical point, even if the cryptosystem is composed by a tent map, which is one of the simplest chaotic maps, setting a finite computation size avoids a ciphertext only attack. The most attractive point of the cryptosystem is that the cryptosystem is composed by only iterating a simple calculations though the information rate of the cryptosystem is about 0.5.


IEEE Transactions on Circuits and Systems I-regular Papers | 2004

FM/PWM control scheme in class DE inverter

Hiroo Sekiya; Hirotaka Koizumi; Shinsaku Mori; Iwao Sasase; Jianming Lu; Takashi Yahagi

This paper presents a new control scheme for a Class DE inverter, that is, frequency modulation/pulsewidth modulation (FM/PWM) control. Further, the FM/PWM controlled Class DE inverter is analyzed and we clarify performance characteristics. Since the FM/PWM controlled inverter has two control parameters, namely, the switching frequency and the switch-on duty ratio, it has one more degree of freedom for the control than the inverter with the conventional control scheme. The increased degree of freedom is used to minimize the switching losses. Therefore, it is possible to control the output power with high power-conversion efficiency for wide-range control. Carrying out the circuit experiments, we confirm that the experimental results agree well with the theoretical predictions quantitatively. For example, the proposed controlled inverter can control the output voltage from 56% to 191% of the optimum one, which is designed for 1.8 W at 1.0 MHz, with maintaining over 90% power-conversion efficiency.


IEEE Transactions on Circuits and Systems I-regular Papers | 1996

Class DE high-efficiency tuned power amplifier

Hirotaka Koizumi; Tadashi Suetsugu; M. Fujii; Kokichi Shinoda; Shinsaku Mori; Kazunaga Iked

A new type of high-frequency high-efficiency tuned power amplifier is proposed, analyzed and verified experimentally. It is called a Class DE tuned power amplifier because its circuit topology is very similar to that of the conventional Class D amplifier and the operation of each switch satisfies the Class E switching conditions when the switch turns on. Class E switching conditions are achieved by providing a shunt capacitor for each switch and realizing a dead-time between the switch-on-times. These conditions take into account that the amplifier operates at higher frequency than the conventional Class D amplifier. The switch voltage stress has kept on the same level to the conventional Class D amplifier. The measured efficiency was over 96% at 1 MHz.


Proceedings of the IEEE | 1981

Multimode oscillations in a modified Van Der Pol oscillator containing a positive nonlinear conductance

Masanori Shinriki; Masahiro Yamamoto; Shinsaku Mori

This report indicates that an oscillation with a random waveform or a sinusoidal waveform is excited by a simple oscillator such as a modified Van Der Pol oscillator containing a positive non-linear conductance.


IEEE Transactions on Circuits and Systems I-regular Papers | 2002

Computation of design values for Class E amplifiers without using waveform equations

Hiroo Sekiya; Iwao Sasase; Shinsaku Mori

This paper presents a novel design procedure for Class E amplifiers without using waveform equations. By the proposed design procedure, Class E amplifiers can be designed regardless of the Q factor of resonant circuit, existence of the switch on resistor, and so on. The proposed design procedure requires only circuit equations and design specifications. All design procedures reported until now require deriving waveform equations which requires a lot of work. The benefits of the proposed design procedure is that it is to deriving waveform equations is no longer necessary. When the circuit equations are obtained, the other procedures for computation of design values are carried out with aid of computer. Therefore, we can design Class E amplifier more easily than the conventional design procedure. The authors design Class E amplifiers by using the proposed design procedures and carry out the circuit experiments, and find that the experimental results agree with calculation results, and show the validity of the proposed design procedure.


IEEE Communications Magazine | 1991

Multi-h phase-coded modulation

Iwao Sasase; Shinsaku Mori

An overview of some recent results for multi-h phase-coded modulation (MHPM) schemes is provided. These schemes offer power and bandwidth efficiency where time-varying modulation indices are used. Following a brief description of the structure of MHPM, its fundamental properties (e.g., minimum Euclidean distance and power spectra) are described. Decoding and demodulation of MHPM also are discussed. and some results on synchronization are summarized. MHPM combined with convolutional codes, asymmetric modulation indices, or nonuniform mapping are investigated.<<ETX>>


IEEE Transactions on Circuits and Systems | 1991

Chaos via torus breakdown in a piecewise-linear forced van der Pol oscillator with a diode

Naohiko Inaba; Shinsaku Mori

Chaos via torus breakdown in the piecewise-linear forced van de Pol equation is studied rigorously by using the degenerate technique. The model is a negative resistance LC oscillator including a diode driven by a sinusoidal voltage source. The authors investigate an idealized case where the diode is assumed to operate as an ideal switch. In this case, the Poincare map is derived strictly as a one-dimensional return mapping of a circuit onto itself. This mapping clarifies the onset of chaos via torus breakdown observed in this circuit. The authors obtain the critical value of the bifurcation parameter analytically, which gives the boundary between the chaotic region and the torus region. This bridges the gaps between the abstract one-dimensional mapping and the real circuit. >


IEEE Transactions on Communications | 1978

Performance of Binary Quantized All Digital Phase-Locked Loop with a New Class of Sequential Filter

Hisao Yamamoto; Shinsaku Mori

Phase-locked loops have been used in various parts of telecommunication systems because of their wide applicability to bit synchronization and FM- and PM-demodulation, etc. Several types of digital phase-locked loops (DPLLs) have also been studied due to the increased reliability and decreased cost of integrated digital circuitry. DPLLs of the type employing binary quantized phase detection and discrete phase adjustments have been utilized for detection of a binary signal or suppression of phase jitter in data-transmission techniques. Unfortunately the width of the locking-range and the ability to suppress phase jitter are contrary to each other, and furthermore, the capacity for jitter suppression rapidly lowers as the frequency of input signal deviates from a free-running frequency of the loop. To improve these vicious properties, a DPLL employing a new type of sequential loop filter is proposed in this paper. The sequential filter controls the properties of itself asymmetrically, depending on the input and output phase distributions to keep the output phase at the center of input phase distribution. The loop performance is analyzed theoretically, experimentally, and by computer simulation in the presence of random Gaussian phase jitter. It is shown that the loop has satisfactory performance as a DPLL used for phase jitter suppression.


applied power electronics conference | 1994

Class E/sup 2/ DC/DC converter with second harmonic resonant class E inverter and Class E rectifier

Hirotaka Koizumi; Minoru Iwadare; Shinsaku Mori

Class E amplifiers have been used as inverters for highly efficient DC/AC energy conversion. ZVS-Class E inverters need an RF choke and ZCS-types have the turn-on switching loss increasing with operating frequency. Both types have nonzero power loss in the on-state resistance of the active switch. The second harmonic resonant Class E inverter has no RF choke and has small power dissipation in parasitic resistance since the shunt capacitor and inductor resonate at the second harmonic of the operating frequency. In this paper, a new type of Class E/sup 2/ converter is proposed and verified experimentally. It consists of the second harmonic resonant Class E inverter and a Class E rectifier. The maximum efficiency achieved was 81.8 percent at 1 MHz.<<ETX>>


IEEE Transactions on Microwave Theory and Techniques | 1985

Development and Testing of a 2450-MHz Lens Applicator for Localized Microwave Hyperthermia (Short Paper)

Yoshio Nikawa; Makoto Kikuchi; Shinsaku Mori

A new type of applicator with a convergent lens for localized microwave hyperthermia is developed. A lens applicator of direct contact type was designed to conduct actual and progressive experiments with phantoms of simulated fat and muscle tissues heated at 2450 MHz. The experimental results showed that the heating power penetration depth increased 40 percent with this applicator as compared to a simple rectangular waveguide applicator with the same size aperture that had generally been used for microwave hyperthermia. Our applicator had a concave-shaped aperture and was designed to contact well with the heating medium whose shape was cylindrical like a human body.

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Hirotaka Koizumi

Tokyo University of Science

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Yoshio Nikawa

National Defence Academy

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Takahiko Saba

Chiba Institute of Technology

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