Hirotake Yamamori

10V programmable Josephson voltage standard circuits using NbN∕TiNx∕NbN∕TiNx∕NbN double-junction stacks

Using NbN∕TiNx∕NbN∕TiNx∕NbN double-junction stack technology we have demonstrated a programmable Josephson voltage standard chip that operates up to 10.16V output voltage cooled with a two-stage Gifford–McMahon cryocooler. The circuit uses double-junction stacks, where two junctions are fabricated in each stack, in order to integrate 327 680 junctions into a 15.3mm×15.3mm chip. A 1-to-32 microwave distribution circuit is also integrated on the chip. The chip is divided into 22 cells, which perform as an 11-bit digital-to-analog converter. The 21 working cells include 307 200 junctions biased with 16GHz microwaves at 10.2K that generated flat voltage steps with current margins greater than 1mA, which indicates good uniformity of the stacked junctions.

Practical high-resolution programmable Josephson Voltage standards using double- and triple-stacked MoSi/sub 2/-barrier junctions

We have developed vertically stacked superconductor normal-metal-superconductor Josephson junction technology for the next-generation quantum voltage standards. Stacked junctions provide a practical way of increasing the output voltage and operating margins. In this paper, we present fully functioning programmable voltage standard chips with double- and triple- stacked MoSi/sub 2/ barrier Josephson junctions with over 100 000 junctions operating simultaneously on a 1 cm /spl times/ 1 cm chip. The maximum output voltages of the double- and triple-stacked chips were 2.6 V and 3.9 V, with respective operating current margins of 2 mA and 1 mA. A new trinary-logic design is used to achieve higher voltage resolution. Thermal transport in these high-density chips will be briefly discussed.

A 10 V programmable Josephson voltage standard circuit with a maximum output voltage of 20 V

A 10 V programmable Josephson voltage standard (PJVS) circuit with a maximum output voltage of 20 V and a microwave bias of 18.5 GHz was designed and fabricated. Although an attempt was made to improve the fabrication yield for the 10 V PJVS circuit, it was not sufficiently large to reproducibly fabricate a perfect chip without any defects. The redundant arrays were additionally integrated to increase the maximum output voltage, which contributed to an increase in the number of available chips under the limited fabrication yield. Fortunately, most of the defective arrays had a zeroth Shapiro step, while the first step was very small or zero. If the array was not dc biased, it did not generate any voltage, because it worked as a superconductive wiring. In this case, the maximum output voltage became smaller than that of a perfect chip, but it functioned as a 10 V PJVS, due to the back-up arrays.

Operation of a NbN-based programmable Josephson voltage standard chip with a compact refrigeration system

A refrigeration system was designed and constructed for realizing a liquid-He-free programmable Josephson voltage standard. The system is equipped with a two-stage Gifford-McMahon cooler, a thermal-radiation shield, a magnetic-field shield and semi-rigid coaxial cables to supply microwave power to a chip. The performance of the system was examined by use of a NbN-based 8-bit digital-to-analog converter (DAC) chip designed as a 1 V programmable voltage standard. When operated at 8.5 K on the cryocooler, constant-voltage steps with amplitudes greater than 1 mA were observed for every segment of junction arrays on the chip.

All-NbN digital-to-analog converters for a programmable voltage standard

Five-bit all-NbN digital-to-analog converters (DACs) for a programmable voltage standard have been fabricated using NbN/TiNx/NbN Josephson junctions and their operation has been demonstrated. The DAC consists of six arrays of 128, 128, 256, 512, 1024 and 2048 junctions per array. We have measured the current–voltage characteristics for the junction arrays driven with a 16 GHz microwave signal at 4.2 and 10 K, resulting in constant-voltage steps with heights larger than 2 mA. The maximum output voltage for the DAC was 136 mV, indicating that all 4096 junctions in the DAC yielded a voltage corresponding to the microwave frequency through the ac Josephson effect.

NbN/TiNx/NbN/TiNx/NbN double-barrier junction arrays for programmable voltage standards

A series array of NbN/TiNx/NbN/TiNx/NbN double-barrier junctions was fabricated on Si wafers, and their current–voltage (I–V) characteristics were measured with and without microwave power in order to investigate their performance for programmable voltage standards. By adjusting the thickness of the TiNx barrier, nearly identical critical currents were obtained for 128 lower and 128 upper junctions in an array. When applying 8 GHz microwave power to an array, a large constant-voltage step (∼3 mA) appeared on the I–V curve. The zero-voltage critical current and the height of the first (n=1) constant-voltage step showed microwave-power dependences coincident with theoretical prediction.

Comparison of a Multichip 10-V Programmable Josephson Voltage Standard System With a Superconductor–Insulator–Superconductor-Based Conventional System

We developed a 10-V dc programmable Josephson voltage standard (PJVS) using a multichip technique. The PJVS was based on NbN/TiNx/NbN junctions and operated using a 10-K compact cryocooler. We carried out an indirect comparison with a superconductor-insulator-superconductor-based conventional Josephson voltage standard (JVS) by measuring the voltage of a 10-V zener diode reference standard. The combined standard uncertainty of the comparison was u c = 0.03 muV(k = 1), and the relative combined standard uncertainty was 3 times10-9.

Chip-to-chip communication using a single flux quantum pulse

Chip-to-chip propagation of a single flux quantum (SFQ) pulse has been demonstrated using an active multichip module (MCM) technique in which active transmitters and receivers are integrated on an MCM substrate as well as on a chip. A chip-to-chip SFQ transfer circuit has been designed and implemented by a standard Nb-trilayer process and solder-bumped flip-chip technology. The correct operation of the circuit has been confirmed by low-frequency testing. Experimental margins for the global factor for bias currents have been as large as /spl plusmn/33%.

Demonstration of a 10 V programmable Josephson voltage standard system based on a multi-chip technique

We have demonstrated a programmable Josephson voltage standard (PJVS) operation up to 10.84 V using a multi-chip technique. We combined two PJVS chips fabricated using NbN/(TiNx/NbN)2 junction technology. Each PJVS chip was mounted on a single chip carrier using bonding wire, and the two chip carriers were connected by a simple Cu lead wire, and mounted on a cryocooler. High-precision measurements confirmed flat voltage steps for all 22 cells, with a peak-to-peak variation of 100 nV and wide margins of at least 0.35 mA. We also confirmed the stability of the voltage steps in spite of a temperature and RF frequency variation of ± 0.1 K and ± 0.1 GHz, respectively.

Precision AC–DC Difference Measurement System Based on a Programmable Josephson Voltage Standard

A system designed for precision measurement of ac-dc difference of thermal voltage converters in terms of a programmable Josephson voltage standard is under development at the National Measurement Institute, Australia, in collaboration with the National Institute of Advanced Industrial Science and Technology, Japan. The agreement between the new system and calculable thermal converters is presently better than 0.5 μV/V at frequencies up to 40 Hz and voltages up to 0.75 V.