Michitaka Maruyama

Preparation of ramp-edge Josephson junctions with natural barriers

We have demonstrated ramp-edge Josephson junctions using high temperature superconductors without depositing artificial barriers. We use a surface barrier formed naturally during an etching process by an Ar ion beam. The resistivity of the barrier, which is evaluated in the Nb/Au/YBCO structures, changes over 4 orders in accordance with the gas pressure in the vacuum annealing executed before the deposition of the counter-electrode. All the junctions having YBCO/barrier/YBCO structure exhibit RSJ-like current-voltage characteristics over the entire temperature range of operation. Fraunhofer-like modulation patterns are observed with a very small amount of excess current even at low temperatures except for large junctions. The temperature dependence of J/sub c/ and R/sub u/A are similar to those in HTS grain boundary junctions. Since the junction parameters are controlled by the total pressure during the vacuum annealing, the junctions made through this procedure have a potential for circuit applications.

Interface-Treated Josephson Junctions in Trilayer Structures

We have demonstrated interface-treated Josephson junctions without deposited barriers in a trilayer structure. In the junctions, barriers were formed through an etching process and an annealing process for base YBa2Cu3O7-x (YBCO) films. The junctions showed resistively-shunted-junction-type characteristics over the entire temperature range below 70 K. A magnetic field modulation of more than 80% was observed throughout the operating temperature range. The obtained IcRn product was 2.1 mV at 4.2 K. The 1σ spreads in the junction parameters of 10% or better were observed for eight out of nine junctions in a chip.

Advances in High-Tc Single Flux Quantum Device Technologies

We have developed the fabrication process, the circuit design technology, and the cryopackaging technology for high-T c single flux quantum (SFQ) devices with the aim of application to an analog-to-digital (A/D) converter circuit for future wireless communication and a sampler system for high-speed measurements. Reproducibility of fabricating rampedge Josephson junctions with I c R n products above 1 mV at 40 K and small I c spreads on a superconducting groundplane was much improved by employing smooth multilayer structures and optimizing the junction fabrication process. The separated base-electrode layout (SBL) method that suppresses the J c spread for interface-modified junctions in circuits was developed. This method enabled low-frequency logic operations of various elementary SFQ circuits with relatively wide bias current margins and operation of a toggle-flip-flop (T-FF) above 200 GHz at 40 K. Operation of a 1:2 demultiplexer, one of main elements of a hybrid-type Σ-△ A/D converter circuit, was also demonstrated. We developed a sampler system in which a sampler circuit with a potential bandwidth over 100 GHz was cooled by a compact stirling cooler, and waveform observation experiments confirmed the actual system bandwidth well over 50 GHz.

Design and Demonstration of a 5-Bit Flash-Type SFQ A/D Converter Integrated With Error Correction and Interleaving Circuits

We have designed a fully integrated 5-bit flash-type single-flux quantum (SFQ) analog-to-digital converter (ADC), in which an error correction and a bit-interleaving circuit are integrated with complementary quasi-one-junction SQUID (CQOS) comparators, and we verified its operation in experiments. Two types of look-back error correction circuits with different clock schemes were designed for the integrated ADCs to avoid the gray zone in comparators and to convert gray code to binary code. The interleaving circuit was also used in the ADC to add one extra bit. A binary 5-bit A/D converter was integrated into an IC chip. Then, input waveforms at low frequencies were successfully retrieved from the binary data of the A/D converter without any errors. We also confirmed that the A/D converter operated properly by conducting tests in our cryocooling system using a 4K-GM cryocooler after the chip was flip-chip bonded onto a multi-chip-module (MCM) carrier. We also used the beat frequency method to test and confirm that the CQOS comparator operated effectively at high frequency, i.e., 3 bits at 15 GHz in the binary code operation and 4 bits at 15 GHz in the gray code operation. Furthermore, operations at sampling frequencies of up to 32 and 50 GHz with a low-frequency analog input signal were experimentally confirmed for a 4-bit comparator circuit with a critical current density Jc of 2.5 kA/cm2 and 10 kA/cm2 , respectively.

A Flash A/D Converter Using Complementarily Combined SQUIDs

We propose a new design of a superconductive flash analog-to-digital (A/D) converter circuit with improved linearity. This circuit is composed of the equivalent of two quasi-one-junction SQUIDs (QOSs) that are connected at the comparator. The analog signal is input to the front end of each of the QOSs complementarily, with opposite polarity for each. Though the mechanism of the quantization in each QOS is basically the same as that in conventional ones, the mixed quantized output shows comparatively superior linearity. Moreover, unintended offsets due to L/R delays are completely canceled in this circuit, suppressing dynamic distortions in the comparator even without a feedback loop for compensation. This makes the circuit free from bandwidth limitation related to the time constant in the loop. We have carried out a computer simulation for A/D converter operation of the circuit and showed a sampling ability of 150 GS/s when the critical current density (J c) is 40 kA/cm2. Functional test results of the circuits are also reported.

Simulation study of high-T/sub c/ superconducting sampler circuit with bandwidth over 100 GHz

We investigated high-T/sub c/ superconducting sampler circuits by computer simulation and proved that our latest version of sampler circuit can operate with bandwidth over 100 GHz. In our conventional sampler circuit, we found several problems in its circuit design. An improved sampler circuit, which has additional reset junctions in the dc/SFQ and SFQ/dc parts of the circuit and has a Josephson transmission line with an optimized dc bias in front of the comparator, accurately reconstructed signal waveforms with bandwidth above 160 GHz for a typical I/sub c/R/sub n/ product of 1 mV in the simulation.

Improvement of the sandwich junction properties by planarization of YBCO films

We have improved the properties of c-axis-oriented YBCO/PBCO/YBCO trilayer junctions using planarization of YBCO films. The root-mean-square value of the film roughness reduces to less than 60% of that of an as-grown film. The junctions made through the planarization exhibit RSJ-like current-voltage characteristics even for 20-nm-thick PBCO interlayers. The characteristic voltage is 0.16 mV at 50 K, which is remarkably improved compared to that of junctions without the planarization.

Possible Application of Flash-Type SFQ A/D Converter to Optical Communication Systems and Their Measuring Instruments

We propose a possible application of a high-speed flash type single flux quantum (SFQ) analogue-to-digital converter (ADC) to optical communication systems and their measuring instruments. One of the problems in optical networks is the chromatic dispersion over a standard single mode fiber, which has to be recovered by optical dispersion compensation. Recently, there has been great interest in 100-Gbit/s Ethernet technologies as next generation optical networks in which chromatic dispersion is more severe. Among several types of architectures, digital coherent optical communication system is a promising technology. Correction of the dispersion is performed electrically after digital conversion without any optical compensation, which would ease system construction. Digital storage oscilloscopes with high-speed ADCs are crucial for investigating the architecture and for constructing 100-GbE systems. A flash-type SFQ ADC is attractive for its high-speed sampling clock capability, especially as an instrument for a digital coherent receiver. The maximum operating frequency of the comparator in ADCs was studied by simulation for various critical current densities (Jc). The simulation suggested that using Jc of 20-40 kA/cm2 enables the comparator to operate at a clock frequency of more than 100 GHz. An O/E converter, a uni-traveling-carrier photodiode, operable at low-temperature, has been developed and 40-GHz operation was confirmed at 5 K. We have also designed a 1-bit slice of a superconducting quantum interference device-(SQUID) wheel-type ADC and its test circuit including a doubler circuit and two driver types.

HTS Sampler with Improved Circuit Design and Layout

This paper reviews our progress on the high-T c superconducting (HTS) sampler development, covering from the circuit design to the latest experimental data in the sinusoidal and pulse waveform measurements. A computer simulation has revealed that our sampler circuit with an improved design enables waveform measurement with the bandwidth over 100 GHz even with the thermal noise at around 40 K. Using the HTS sampler circuits fabricated employing an improved layout, we demonstrated waveform measurements for sinusoidal signals with frequencies of up to 50 GHz, the upper limit of the signal generator we used, both in the voltage-input-type system with a high-frequency input line and in the current-input-type one with a superconducting pickup coil. In the pulse measurement using an on-chip sampler, we succeeded in observing pico-second-order-wide single flux quantum (SFQ) current pulses, suggesting the potential bandwidth of our HTS sampler of more than 125 GHz.

Johnson Noise Thermometry Based on Integrated Quantum Voltage Noise Source

We performed Johnson noise thermometry (JNT) using an integrated quantum voltage noise source (IQVNS) that generates pseudorandom noise with an RMS value determined by the product of the flux quantum, the clock frequency of IQVNS, fclk, and a calculable coefficient. The working principle is different from the conventional QVNS. The waveform of the IQVNS was analyzed thoroughly, and the source checked to see that it worked properly as intended, particularly in regard to its applicability as a reference for JNT measurements. The thermal noise power of a resistor at the triple point of water was measured with the IQVNS to derive a value of the Boltzmann constant.