Hisashi Shichijo

Active Terahertz Imaging Using Schottky Diodes in CMOS: Array and 860-GHz Pixel

Schottky-barrier diodes (SBDs) fabricated in CMOS without process modification are shown to be suitable for active THz imaging applications. Using a compact passive-pixel array architecture, a fully-integrated 280-GHz 4 × 4 imager is demonstrated. At 1-MHz input modulation frequency, the measured peak responsivity is 5.1 kV/W with ±20% variation among the pixels. The measured minimum NEP is 29 pW/Hz1/2. Additionally, an 860-GHz SBD detector is implemented by reducing the number of unit cells in the diode, and by exploiting the efficiency improvement of patch antenna with frequency. The measured NEP is 42 pW/Hz1/2 at 1-MHz modulation frequency. This is competitive to the best reported performance of MOSFET-based pixel measured without attaching an external silicon lens (66 pW/Hz1/2 at 1 THz and 40 pW/Hz1/2 at 650 GHz). Given that incorporating the 280-GHz detector into an array increased the NEP by ~ 20%, the 860-GHz imager array should also have the similar NEP as that for an individual detector. The circuits were utilized in a setup that requires neither mirrors nor lenses to form THz images. These suggest that an affordable and portable fully-integrated CMOS THz imager is possible.

280GHz and 860GHz image sensors using Schottky-barrier diodes in 0.13μm digital CMOS

Millimeter and sub-millimeter-wave imaging using solid-state circuits is gaining attention for security and medical applications. To lower cost and increase integration, MOSFETs in CMOS are being investigated for implementing broadband detectors [1-3]. However, neither measured noise-equivalent power (NEP) nor noise floor of the imager was given in [1]. Although NEP of 17pW/Hz1/2 was achieved at 650GHz in [2], an external lens was attached to the 65nm SOI CMOS chip. In [3], an NEP of 66pW/Hz1/2 was measured at 1.05THz using 65nm CMOS without a lens attached to the chip. Additionally, although the efforts reported in [1-3] realized an array, none demonstrated the image-array function. As an alternative, polysilicon-gate-separation (PGS) Schottky-barrier diodes (SBD) with cut-off frequency of ~2THz were fabricated in CMOS without process modifications [4] and were used to demonstrate a 280GHz detector with NEP of 30pW/Hz1/2 [5,6]. To significantly enhance the scanning speed, a 16-pixel 280GHz SBD imager is fabricated and its array function is reported in this paper. The imager including baseband amplifiers achieves responsivity of 5.1kV/W and NEP of 29pW/Hz1/2. More importantly, its operation was demonstrated in a setup that requires no mirror or lens that is bulky and costly. Next, an 860GHz SBD detector is demonstrated with a measured non-amplified responsivity of 355V/W and NEP of 32pW/Hz1/2. This NEP is ~2X lower than the best reported work in CMOS [3]. Both chips are fabricated in a 0.13μm logic CMOS. The results suggest a path for high performance, compact and affordable sub-millimeter-wave and terahertz CMOS imagers using SBDs.

I-Gate Body-Tied Silicon-on-Insulator MOSFETs With Improved High-Frequency Performance

A new body-tied (BT) (I-gate) silicon-on-insulator transistor with comparable f_T and f_ as those of floating-body transistors and comparable analog performance as those of T-gate BT transistors is demonstrated. The structure is fabricated without process modifications by selectively blocking silicide formation and source/drain implant in a foundry technology.

A Physical Understanding of RF Noise in Bulk nMOSFETs With Channel Lengths in the Nanometer Regime

Experimental and simulation results of high-frequency channel noise in MOSFETs with 40-, 80-, and 110- nm gate lengths are presented. The measured dc I-V characteristics can be matched using the drift-diffusion (DD) and hydrodynamic (HD) transport models, both incorporating velocity saturation. The DD model grossly underestimates the measured noise, demonstrating the inadequacy of channel-length modulation and impact ionization to explain the excess noise. The HD model generates higher noise but not enough, showing that introduction of carrier heating is still insufficient to explain the experimental results. The underprediction of noise using the HD model can be mitigated by a suitable choice of the energy relaxation time and saturation velocity; however, simultaneous matching of both noise and dc I-V does not produce satisfactory results. Thus, TCAD simulators are unable to simulate this excess-noise mechanism at this time. Experimental data support that, at 40 nm gate lengths, noise can be described by a shot noise like expression.

Broadband Root-Mean-Square Detector in CMOS for On-Chip Measurements of Millimeter-Wave Voltages

A root-mean-square Schottky diode detector for estimating millimeter-wave (80-110 GHz) signal voltage using dc or low-frequency measurements for debugging and self-testing is demonstrated. The detector is realized in a 45-nm CMOS process without any process modifications. The detector gain at 30-mVrms input voltage is 11 V-1 . The insertion loss is less than 0.2 dB, and the flatness of the detector gain over 80-110 GHz is 15%. The input dynamic range is greater than 29 dB, and the size of the detector including the filter capacitor is 340 m2.

Compact, High Impedance and Wide Bandwidth Detectors for Characterization of Millimeter Wave Performance

Root mean square (RMS) Schottky barrier diode (SBD) detectors with detector gain of 4.6 V-1 , operating frequency range around 30-50 GHz or bandwidth greater than 20 GHz, and an area of 36 μm2 are demonstrated in 45-nm SOI CMOS. The maximum detector insertion loss up to 50 GHz is 0.1 dB relative to that for a thru structure with a maximum loss of 0.25 dB. The detectors for the first time are simultaneously compact, high impedance, and wide bandwidth. The Schottky diode and detectors are also the first demonstration in nano-scale SOI CMOS. The detectors allow measurements of internal-node voltages of millimeter wave circuits with a DC voltmeter. Using the detectors, the frequency responses of node voltages and gains in a millimeter wave mixer are measured. Adding the detectors to the mixer, while improving mixer IIP3, should not degrade the mixers noise and gain characteristics, and does not increase the die area. With an external micro-controller, autonomous bias optimization for maximum conversion gain is also demonstrated.

A Unified Equivalent-Circuit Model for Coplanar Waveguides With Silicon-Substrate Skin-Effect Modeling

In this paper, a novel unified equivalent-circuit model with silicon (Si)-substrate skin-effect modeling is demonstrated to describe the performance of coplanar waveguide (CPW) lines with a wide range of dimensions and substrate resistivities, up to 110 GHz. HFSS is used to simulate the CPWs on 8000-, 15-, and 0.015-Ω·cm resistivity Si substrates. The electric field distributions of the CPWs are analyzed and compared, to demonstrate that the operation mode of the line on the 0.015-Ω·cm resistivity Si substrate is the skin-effect mode and is different compared to the commonly used quasi-TEM mode in high-resistivity substrates. A novel unified equivalent circuit is developed to model all the three operation modes for CPWs (the slow-wave mode, the skin-effect mode, and the dielectric quasiTEM mode). Agilent Momentum is used to compare with the model up to 110 GHz. CPWs with different substrate resistivities and geometries are then fabricated for verification. The results show that this model can be applied to CPWs with various geometries on different resistivity substrates. Since the model is physics based and analytical, it can be easily included with other device models for RF applications.

Schottky diodes in CMOS for terahertz circuits and systems

Using Polysilicon Gate Separated Schottky Diode structures that can be fabricated without any process modifications in a foundry digital 130-nm CMOS process, cut-off frequency of ~2 THz has been measured. In addition, exploiting the complementary of CMOS technology, an anti-parallel diode pair with cut-off frequency of ~660 GHz consisting of an n-type and a p-type Schottky diode has been demonstrated in the same 130-nm CMOS process. Using the diodes, a frequency doubler and a tripler have been demonstrated. Additionally, the diodes have been utilized to implement 280-GHz and 860-GHz detectors for imaging. A fully-integrated 280-GHz 4×4 imager array exhibits measured NEP of 29pW/Hz½ and responsivity of 5.1kV/W (323V/W without the amplifier). The 860-GHz detector without an amplifier achieves responsivity of 355V/W and NEP of 32pW/Hz½. The NEP at 860GHz is 2X better than the best reported performance of MOSFET-based imagers without a silicon lens attached to the chip.

Terahertz image sensors using CMOS Schottky barrier diodes

Schottky-barrier diodes fabricated in CMOS without process modification are shown to be suitable for THz imaging. Two THz imagers using a 130-nm digital CMOS technology are demonstrated. A fully-integrated 280-GHz 4×4 imager array exhibits a measured NEP of 29 pW/Hz1/2 and a responsivity of 5.1kV/W (323 V/W without the amplifier). For the first time, electronic-scanning multi-pixel imaging is demonstrated in a setup that does not require bulky and costly optical lenses and mirrors. A second detector operating at 860 GHz is also demonstrated. The detector without an amplifier achieves responsivity of 355 V/W and NEP of 32 pW/Hz1/2. It is shown that the comparable responsivity and NEP as that of 280-GHz detector is due to the improvement of patch antenna efficiency at 860 GHz. The NEP at 860 GHz is 2X better than the best reported performance of MOSFET-based imagers without silicon lens attached to the chip.

Extinction of random telegraph switching in small area silicon metal-oxide-semiconductor transistors

Random telegraph switching (RTS) noise showing a slow decay in the switching rate at cryogenic temperatures which leads to the eventual extinction of the discrete noise fluctuations has been observed in the drain-source current (IDS) of small area (<0.05u2009μm2) Si n-channel metal-oxide-semiconductor field-effect transistors. The RTS noise was characterized by current fluctuations between two discrete current levels spaced ΔIDS apart with relative fluctuation amplitude ΔIDS/IDS from 2% to 76%, depending on the device, over a finite interval of gate bias. In all devices showing RTS, the average switching rate gradually diminished to zero over a time of 1 to 2u2009h at 15u2009K while maintaining the nearly constant fluctuation amplitude so that the RTS eventually ceased with IDS staying in its lower current state. This decay in the switching rate may be due to a metastable oxygen vacancy defect that gradually repairs itself after repeated capture and emission of charge, deactivating the trap defect. Once gone, RTS noise did not reappear in any subsequent measurements of a given device even after bias and temperature cycling, suggesting a mechanism to deactivate at least some forms of RTS through a “cryogenic anneal.”Random telegraph switching (RTS) noise showing a slow decay in the switching rate at cryogenic temperatures which leads to the eventual extinction of the discrete noise fluctuations has been observed in the drain-source current (IDS) of small area (<0.05u2009μm2) Si n-channel metal-oxide-semiconductor field-effect transistors. The RTS noise was characterized by current fluctuations between two discrete current levels spaced ΔIDS apart with relative fluctuation amplitude ΔIDS/IDS from 2% to 76%, depending on the device, over a finite interval of gate bias. In all devices showing RTS, the average switching rate gradually diminished to zero over a time of 1 to 2u2009h at 15u2009K while maintaining the nearly constant fluctuation amplitude so that the RTS eventually ceased with IDS staying in its lower current state. This decay in the switching rate may be due to a metastable oxygen vacancy defect that gradually repairs itself after repeated capture and emission of charge, deactivating the trap defect. Once gone, RTS noi...