Hitoshi Mikami

Lattice Bending in LEC-Grown Semi-Insulating GaAs Wafers

Lattice bending in LEC-grown semi-insulating GaAs crystal wafers was investigated by X-ray diffraction. Various distributions in the lattice bending were observed in wafers from different boules. Prominent bends, with radii of curvature of about 20 m, were observed at places where the relevant topographs showed the presence of fine cellular dislocation networks. The apparent wafer bending was also examined optically and was found to be caused mainly by back surface damage.

Experimental study on the correlation between thermal‐wave signals and dopant profiles for silicon‐implanted GaAs

The correlation between the contour maps of thermal‐wave signals and those of carrier concentrations in GaAs substrates was investigated to understand which portion of an implanted profile mainly corresponds to the generation of thermal‐wave signals. It was found that the thermal‐wave signals on a Si‐implanted GaAs wafer showed good correlation with the peak concentration in the carrier profile obtained from capacitance‐voltage (C‐V) measurements. This method is useful for the threshold voltage monitoring of GaAs metal‐semiconductor field‐effect transistors with a thin implanted channel layer, which cannot be characterized by conventional C‐V measurement.

Mobility profiles in short and narrow GaAs MESFET channels

Gate-voltage-dependent mobility profiles in long-, short-, wide-, and narrow-channel WN/sub x/-BPLDD (buried p-type buffer lightly doped drain region) GaAs MESFETs have been determined (L/sub G/=10, 4, 2, 1, 0.8, 0.5, 0.3 mu m, W/sub G/=20 mu m; W/sub G/-100, 40, 20, 10, 4, 2 mu m, L/sub G/=0.5 mu m). The mobility mainly depends on the channel width, while the gate length has much less influence. Thus, using proper gate dimensions the channel mobility can be tuned. The highest drift mobility values agree quite well with the measured Hall mobilities. Mobility profiles of large-area MESFETs are probably degraded by the WN/sub x/-gate fabrication process. Injected excess charges at gate length below 0.5 mu m distorts the mobility evaluations. >

Minimum-size effects in asymmetric tilt-angle-implanted LDD-WN/sub x/-GaAs MESFET's

Asymmetric tilt-angle-implanted lightly doped drain (LDD)-WN/sub x/-GaAs MESFETs with an optimized transconductance performance are discussed. A tilt-angle implantation is used to reduce the parasitic source resistance below the gate sidewall without increasing short- and narrow-channel effects. This leads to a transconductance increase of nearly 25% for submicrometer FETs while the gate-source capacitance increase is almost negligible. The influence of the implantation angle on the threshold voltage transconductance, and Schottky-barrier characteristics is reported. >

Analysis of planar channeling effects on the threshold voltage uniformity of GaAs metal‐semiconductor field‐effect transistors using stereographic projection

Planar channeling effects on the threshold voltage uniformity of GaAs metal‐semiconductor field‐effect transistors within 3‐in. GaAs wafers have been investigated using the stereographic projection method. This method is very useful for a quantitative understanding of the angular relationship between the direction of an incident ion beam and wafer orientation during implantation. The ratio N(X1)/N(X2) of the peak carrier concentration at a depth of X1 to the carrier concentration of a depth of X2=2X1, obtained from the carrier depth profiles, was employed as a suitable parameter which effectively reflects the variation in the carrier profiles arising from the planar channeling effects. The conclusion, that the most uniform implants are attained at an azimuthal angle of 26.5° when tilting the wafer 10°, was analytically derived from the stereographic projection method and was experimentally confirmed.

WNX–Schottky diodes on semiconductor–insulator–semiconductor‐like n‐GaAs/undoped‐AlGaAs/n‐GaAs heterostructures

WNX –Schottky diodes on semiconductor–insulator–semiconductor‐like n‐GaAs/undoped‐AlGaAs/n‐GaAs heterostructures have been fabricated at various annealing temperatures. The barrier characteristics are evaluated and compared with those of WNX –n‐GaAs Schottky contacts. At lower annealing temperatures the metal–insulator–semiconductor (MIS) like diodes exhibit superior barrier heights. However, at higher annealing temperatures (TA≥800 °C), both the MIS and WNX –n‐GaAs Schottky diodes almost have equivalent barrier heights. The ideality factors of the MIS like diodes are worse over the whole temperature range. Thicker undoped AlGaAs layers result in increased barrier heights at lower annealing temperatures (TA≤800 °C).

Mobility Profiles in Self-Aligned WNX-Undoped AlGaAs/n-GaAs/Undoped AlGaAs Doped-Channel Hetero-MISFETs

Drift mobility profiles in self-aligned WNX-undoped AlGaAs/n-GaAs/undoped AlGaAs doped-channel hetero MISFETs (DMT) with different gate lengths are evaluated (LG=1, 2, 4, 9 µm). The mobility profiles peak between 1400 and 1600 cm2/Vs in the accumulation mode of operation. The drift mobility maximum is shifted to higher gate voltages with decreasing the gate length.

Highly uniform ion implants into GaAs by wafer rotation

The influence of wafer rotation on implanted dose uniformity was investigated using thermal‐wave measurement to realize highly uniform ion implants into a (001) wafer. It was found that conically rotating ion implantation is an effective way to scramble the scanning ion beam during implantation by using an electrostatic‐scan implantation system with a specially designed wafer station. Furthermore, two‐fold ion implantation was employed to correct the dose inhomogeneity caused by the variation of the tilt angle across a wafer. Based on these considerations, a high dose uniformity of less than 1% across a wafer was achieved.

Characterization of Si +-implanted GaAs substrates using thermal-wave measurement

Abstract Thermal-wave measurement was used to characterize Si + -implanted 3 in. diameter, semi-insulating GaAs wafers just after implantation. The results indicated that the distribution map of thermal-wave signals on a GaAs wafer agreed well with that of the peak carrier concentration of the carrier profile obtained from capacitance-voltage ( C – V ) measurements. On the basis of a linear relation between the thermal-wave signal and the implantation dosage, this method is shown to be a very effective tool in the threshold voltage monitoring of GaAs metal-semiconductor field effect transistors with a thin implanted channel layer which cannot be characterized by conventional C – V measurement.