Kazuya Nishihori

Refractory WNx/W Self-Aligned Gate GaAs Power Metal-Semiconductor Field-Effect Transistor for 1.9-GHz Digital Mobile Communication System Operating with a Single Low-Voltage Supply

We have developed a refractory WNx /W self-aligned gate GaAs power metal-semiconductor field-effect transistor (MESFET) for use in L-band digital mobile communication systems. This power MESFET operates with high efficiency and low distortion at a gate bias of 0 V and a low drain bias of 2.7 V, because of its small drain knee voltage, high transconductance and sufficient breakdown voltage. This power MESFET is quite promising for a highly efficient linear power amplifier IC operating with a single low-voltage supply. Good output characteristics of the power MESFET with 1 mm gate width were attained for π/4-shifted quadrature phase shift keying (QPSK) modulated input signals in the 1.9-GHz band, such as an output power of 18.4 dBm, a power gain of 19.0 dB and a high power-added efficiency of 26.4% when a sufficiently low adjacent channel leakage power of -58 dBc was obtained.

A self-aligned gate GaAs MESFET with p-pocket layers for high-efficiency linear power amplifiers

This paper describes a newly developed GaAs metal semiconductor field-effect transistor (MESFET)-termed p-pocket MESFET-for use as a linear power amplifier in personal handy-phone systems. Conventional buried p-layer technology, the primary technology for microwave GaAs power MESFETs, has a drawback of low power efficiency for linear power applications. The low power efficiency of the buried p-layer MESFET is ascribed to the I-V kink which is caused by holes collected in the buried p-layer under the channel. In order to overcome this problem, we have developed the self-aligned gate p-pocket MESFET which incorporates p-layers not under the channel but under the source and drain regions. This new MESFET exhibited high transconductance and uniform threshold voltage. The problematic I-V kink was successfully removed and an improved power efficiency of 48% was achieved under bias conditions, which resulted in adjacent channel leakage power at 600-kHz offset as low as -59 dBc for 1.9-GHz /spl pi//4-shift QPSK modulated input.

A symmetric GaAs MESFET structure with a lightly doped deep drain for linear amplifiers operating with a single low-voltage supply

An improved symmetric GaAs MESFET structure with a lightly doped deep source/drain is proposed for application to power amplifiers in mobile communication terminals. With lightly doped deep drain, the impact ionization falls as the electron current expands and the current density decreases. Thus, the breakdown voltage rises, while a high transconductance and low parasitic resistance are maintained. Furthermore, the symmetric structure suits for mass production because of its fabrication process without mask alignment precision. This structure was fabricated using the WNx/W self-aligned gate process, and DC and RF characteristics were evaluated. The power-added efficiency was 37% at an adjacent channel leakage power of -55 dBc for 37%-shift QPSK modulated input signals at 1.9 GHz with a single positive supply voltage of 3 V. The efficiency was also high at a lower supply voltage: 34% at 1.2 V.

Thermal analysis of GaAs power monolithic microwave IC's mounted with epoxy attachment

The effect of chip-mounting attachment on the thermal resistance of GaAs power field effect transistor (FET) modules has been experimentally investigated. The thermal resistance was evaluated for different GaAs chip thickness of 150 and 250 /spl mu/m through an electrical method utilizing temperature dependence of Schottky-barrier in the GaAs metal semiconductor FETs (MESFETs). The thermal resistance of low-cost epoxy-mounted GaAs chips, suitable for uniplanar monolithic microwave ICs (MMICs), was found not to increase even up to a chip thickness of 250 /spl mu/m, while that of AuSn-mounted GaAs chips increased as was conventionally expected. Numerical simulation has also been presented for the similar case of GaAs power MMICs. The result of simulation suggests that lower thermal conductivity of attachment material, such as epoxy attachment, leads to larger optimum chip thickness that minimizes the total thermal resistance.

A 6 K-gate GaAs gate array with a new large-noise-margin SLCF circuit

A 6 K-gate GaAs gate array has been successfully designed and fabricated using a novel large-noise-margin Schottky-diode level-shifter capacitor-coupled FET logic (SLCF) circuitry and a WN/SUB x/ gate selfaligned lightly doped drain (LDD) structure GaAs MESFET process. Chip size was 8.0/spl times/8.0 mm/SUP 2/. A basic cell can be programmed as an SLCF inverter, a two-input NOR, or a two-input NAND gate. The unloaded propagation delay time was 76 ps/gate a 1.2-mW/gate power dissipation. The increases in delay time due to various loading capacitances were 10 ps/fan-in, 45 ps/fan-out, and 0.64 ps/IF. A 16-b serial-to-parallel-to-serial (S/P/S) data-conversion circuit was constructed on the gate array as an application example. A maximum operation frequency of 852 MHz was achieved at a 952-mW power dissipation, including I/O buffers.

Buried-Channel WNx/W Self-Aligned GaAs MESFET Process with Selectively Implanted Channel and Undoped Epitaxial Surface Layers for MMIC Applications

The combined process of epitaxy and ion implantation has been developed in the fabrication of a buried-channel WN x /W self-aligned GaAs metal-semiconductor field-effect transistor (MESFET). This MESFET comprises an ion-implanted channel and an undoped GaAs epitaxial surface layer. The ion-implantation technique leads to an IC-oriented process and the epitaxial technique to a buried channel structure. Both ease of isolation and enhanced breakdown voltage were attained, promising monolithic microwave integrated circuits (MMICs) for L-band digital mobile communication systems

WNX–Schottky diodes on semiconductor–insulator–semiconductor‐like n‐GaAs/undoped‐AlGaAs/n‐GaAs heterostructures

WNX –Schottky diodes on semiconductor–insulator–semiconductor‐like n‐GaAs/undoped‐AlGaAs/n‐GaAs heterostructures have been fabricated at various annealing temperatures. The barrier characteristics are evaluated and compared with those of WNX –n‐GaAs Schottky contacts. At lower annealing temperatures the metal–insulator–semiconductor (MIS) like diodes exhibit superior barrier heights. However, at higher annealing temperatures (TA≥800 °C), both the MIS and WNX –n‐GaAs Schottky diodes almost have equivalent barrier heights. The ideality factors of the MIS like diodes are worse over the whole temperature range. Thicker undoped AlGaAs layers result in increased barrier heights at lower annealing temperatures (TA≤800 °C).

A self-aligned buried-channel heterostructure GaAs FET with high breakdown voltage for use in mobile communications systems

The combined process of epitaxy and ion implantation has been developed in the fabrication of a buried-channel WNx/W self-aligned heterostructure GaAs FET. This FET comprises an ion implanted channel and an undoped AlGaAs epitaxial surface layer. The ion-implantation technique leads to an IC-oriented process and the epitaxial technique to a buried channel structure. Both ease of isolation and enhanced breakdown voltage were attained, promising MMICs for L-band digital mobile communication systems.

Mobility Profiles in Self-Aligned WNX-Undoped AlGaAs/n-GaAs/Undoped AlGaAs Doped-Channel Hetero-MISFETs

Drift mobility profiles in self-aligned WNX-undoped AlGaAs/n-GaAs/undoped AlGaAs doped-channel hetero MISFETs (DMT) with different gate lengths are evaluated (LG=1, 2, 4, 9 µm). The mobility profiles peak between 1400 and 1600 cm2/Vs in the accumulation mode of operation. The drift mobility maximum is shifted to higher gate voltages with decreasing the gate length.

A Self-Aligned Gate AlGaAs/GaAs Heterostructure Field-Effect Transistor with an Ion-Implanted Buried-Channel for use in High Efficiency Power Amplifiers

In this paper we report on a self-aligned gate buried-channel Al0.22Ga0.78As/GaAs heterostructure field-effect transistor (BC-HFET). The BC-HFET comprises a selectively ion-implanted channel and an undoped i-AlGaAs surface layer. In order to realize the buried channel heterostructure, a combined process of ion-implantation and epitaxial growth is developed. The post-implantation annealing before the epitaxial growth successfully reduces the interdiffusion at the heterointerface between the ion-implanted GaAs channel and the AlGaAs surface layer. The BC-HFET overcomes the disadvantages of a low breakdown voltage which exists in conventional self-aligned gate MESFETs. The BC-HFET exhibits a high breakdown voltage of 8 V and a high Schottky barrier height of 0.75 eV. The 1-mm-wide power BC-HFET demonstrates an output power of 18.2 dBm and a drain efficiency of 50% at a low adjacent channel leakage power of -59 dBc for a 1.9-GHz π/4-shifted quadrature phase shift keying (QPSK) modulated input, for use as Personal Handy-phone System handsets.