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Featured researches published by Hitoshi Onozeki.


electronic components and technology conference | 2005

Profile-Free Copper Foil for High-Density Packaging Substrates and High-Frequency Applications

Nobuyuki Ogawa; Hitoshi Onozeki; Norio Moriike; Takahiro Tanabe; T. Kumakura

A new profile-free copper foil has been developed whose surface roughness is Rz <1.5 mum with satisfactory adhesion strength. An original surface treatment provided affords good peel strength (0.7 kN/m or more) equivalent to that for the conventional roughened foil with sufficient reliability. With the new profile-free copper foil, the conventional subtractive method is applicable to the wiring of 60 mum pitch or less, and the short-circuit fault of electroless Ni/Pd/Au plating that is prone to occur in fine wiring could be restrained since the wiring is formed on a smooth surface. Moreover, the transmission loss at 5 GHz band is decreased by 8 dB/m since the surface roughness of the conductor line is suppressed


electronic components and technology conference | 2013

The new primer with copper foil corresponding to semi-additive process for package substrates

Hitoshi Onozeki; Tsubasa Inoue; Katsuji Yamagishi; Takahiro Tanabe; Takayuki Suzuki; Kenichi Ikeda; Nobuyuki Ogawa

The demand for downsized and light-weighted electronic parts has become stronger to realize the higher electrical performance and smaller size of electronic equipment. Thus, the package substrate used in electronics is demanded to be thinner and higher in wiring density. Generally, semi-additive process using insulating film is used to form lines finer than line/space: L/S=20/20 μm in the package. The problem is that the thinner insulating film is likely to cause the higher warpage due to the higher coefficient of thermal expansion (CTE) and lower modulus. The applying glass-fabric prepreg to outer-layer of the package may result in the lower warpage, but it is difficult to make finer lines less than L/S=20/20 μm [1]. We started to develop the new primer with a copper foil (PF-EL) having high adhesion property with electrolessly plated copper and glass-fabric prepreg. After laminating the PF-EL with glass-fabric prepreg, the copper foil is etched out. Then, the surface of appropriate roughness made by replica of the copper foil profile is remained on the primer. The primer with appropriate roughness is applicable to semi-additive process, resulting in the higher wiring density and lower warpage for package substrate. In addition, PF-EL can be also applicable to the conventional press process without the laminator process. The peel strength of PF-EL for electrolessly plated copper is equivalent to that of the chemically roughened insulating film (0.7 kN/m or more), the sufficiently enough value for the excellent reliability. This higher peel strength is achieved by chemical functional groups and the optimization of curing degree of primer resin. The line/space of the fine line obtained with the primer is L/S=10/10 μm.


electronic components and technology conference | 2017

Electrical Transmission Properties of HBM Interface on 2.1-D System in Package Using Organic Interposer

Yutaka Uematsu; Nobuyuki Ushifusa; Hitoshi Onozeki

We propose a 2.1-D SiP that uses an organicinterposer for HBM applications and describe a demonstration of the technology. This SiP structure consists of a newly developed thin photosensitive insulation film multilayer (organic interposer) on a conventional organic package, enabling the package cost to be well controlled. An HBM interconnect was achieved in just two signaling metal layers with an L/S of 2/2 µm. The connection between the metal layers was achieved by vias as small as 5 µm in diameter through a very thin photosensitive insulation film layer about 4 µm thick. The electrical transmission properties of the HBM were demonstrated in a simulation. The simulation resultsshow a very good eye opening of up to 3 Gbps.


Archive | 2005

Adhesion Assisting Agent Fitted Metal Foil, and Printed Wiring Board Using Thereof

Nobuyuki Ogawa; Hitoshi Onozeki; Takahiro Tanabe; Kenji Takai; Norio Moriike; Shin Takanezawa; Takako Ejiri; Toshihisa Kumakura


Archive | 2007

Substrate for mounting semiconductor element with stress relaxation layer and its manufacturing method

Kenichi Kamiyama; Nobuyuki Ogawa; Hitoshi Onozeki; Takahiro Tanabe; 健一 上山; 信之 小川; 仁 小野関; 貴弘 田邉


Archive | 2006

Metallic foil with adhesion adjuvant, printed-wiring board using the same, and manufacturing method for printed-wiring board

Michio Moriike; Nobuyuki Ogawa; Hitoshi Onozeki; Kenji Takai; Takahiro Tanabe; 信之 小川; 仁 小野関; 教夫 森池; 貴弘 田邉; 健次 高井


electronic components and technology conference | 2016

In Plane Collective CoS Assembly by NCF-TCB Enabled Using the Newly Developed Bonding Force Leveling Film

Hitoshi Onozeki; Hiroshi Takahashi; Naoya Suzuki; Kumpei Yamada; Yuta Koseki


Archive | 2005

Metal foil provided with adhesion auxiliary material and printed wiring board using same

Nobuyuki Ogawa; Hitoshi Onozeki; Takahiro Tanabe; Kenji Takai; Norio Moriike; Shin Takanezawa; Takako Ejiri; Toshihisa Kumakura


Archive | 2009

Metal foil with thermosetting resin composition layer, metal clad laminated plate, and printed wiring board

Hitoshi Onozeki; Takahiro Tanabe; 仁 小野関; 貴弘 田邉


Archive | 2008

Two-layered laminate having metal foil cladded on its one surface, method for production of the laminate, single-sided printed wiring board, and method for production of the wiring board

Hitoshi Onozeki; Takahiro Tanabe; Kiyoshi Saitou

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