Hong-Seok Kim

Fogging and pattern loading effect by writing strategy

As the CD specification on Masks is getting more tighten, the fogging effect by re-scattered incident electron at a high acceleration e-beam system and the loading effect at dry etching step due to pattern density are current critical issues for mask making. These give rise to the variation of mean CD value and the degradation of global CD uniformity. So we have to correct these effects accurately in order to meet the CD specification for design rule 0.15um or below devices. In this paper, we have applied a new positive CA (chemically amplified) resist from Fuji Film Arch co., It was written at 50 kV variable vector scan E-beam system and we tried to classify the CD error by the fogging and loading effect, respectively. Also we have compared with ZEP7000 resist, non-CAR positive type, which is used widely for conventional e-beam mask making to assess the CAR performance, especially in terms of CD error causing by the fogging effect. Through this comparison test, we found that the CD error due to the fogging effect shows somewhat different value according to resist type and writing strategy even though use same exposure dose. In this paper, we have assumed that such results are due to the difference of dose latitude. Dose latitude is different as intrinsic contrast value of each resist and writing strategy such as writing pass, should affect on beam profile (dose profile), it can also change pattern profile of resist and it can finally cause a dose latitude difference. Finally, we have evaluated for CD mean error and uniformity error by fogging and etch loading as open ratio changing, respectively.

Investigations on microloading effect: a parallel approach to PGSD (proximity gap suction development)

The move towards smaller feature size continuously requires more accurate lithography models. Part of models improvement comes from a better understanding of involved physics and chemistry. State of the art models assume development rate to be dependent on level of de-protection of resist film while development kinetics is not taken into account. Model refinements consist in getting a good model of development rate versus de-protection level. Recent studies have put in evidence the importance and the influence of development kinetics. Based on this, a new development process concept has been developed: the Proximity Gap Suction Development (PGSD). This paper presents a parallel approach to PGSD using megasonic agitation in order to improve development process understanding. Analysis has been performed by focusing on microloading effect characterization, also taking into account Critical Dimension (CD) linearity, CD iso-dense bias. Interpretation and analysis were achieved through use of DOE techniques. Results are then discussed with respect to previous PGSD studies but also to current development models. It is believed that improvement of development process could be also achieved in wafer making through the use of high flow rate development techniques such as PGSD or megasonic development.

ArF halftone PSM cleaning process optimization for next-generation lithography

ArF lithography which is expected for the next generation optical lithography is adapted for 0.13 micrometers design-rule and beyond. ArF half-tone phase shift mask (HT PSM) will be applied as 1st generation of ArF lithography. Also ArF PSM cleaning demands by means of tighter controls related to phase angle, transmittance and contamination on the masks. Phase angle on ArF HT PSM should be controlled within at least +/- 3 degree and transmittance controlled within at least +/- 3 percent after cleaning process and pelliclization. In the cleaning process of HT PSM, requires not only the remove the particle on mask, but also control to half-tone material for metamorphosis. Contamination defects on the Qz of half tone type PSM is not easy to remove on the photomask surface. New technology and methods of cleaning will be developed in near future, but we try to get out for limit contamination on the mask, without variation of phase angle and transmittance after cleaning process.

Negative chemically amplified resist in making mask for a logic device with high pattern density

Recently there has been significant interest in the using of chemically amplified (CA) resists for the mask making industry because of their high sensitivity, high contrast, and good dry etch resistance. Especially positive CA resists with high acceleration voltage E-beam systems are being become the main stream of making for advanced masks. However, the positive CA resists often make the issue of the CD uniformity degradation by the fogging effect at a high acceleration voltage (50keV) E-beam writing tool as writing for masks, which are having a high pattern density. In previous our paper, we have already confirmed that a positive CA resist shows the CD uniformity error more than 30nm by the fogging effect at the mask which is having above 40% pattern density, even if its CD uniformity error value is smaller than 50nm of ZEP. In this paper, we have described and studied for the performances of the negative CA resist at the 50keV e-beam writing tools in advanced mask making like logic device with high pattern density and we have compared with a positive CA resist at the 50keV e-beam writing tools. Furthermore, we have confirmed that the negative CA resist have an advantage what is in advanced mask making process like logic device masks with high pattern density at 50keV e-beam writing tool and they have been compared with the positive CA resist.

Investigation on micro-trench formation of alternating aperture phase shift masks

Phase Shift Masks (PSMs) have been widely used in the photomask industry for nowadays. Among several types of PSMs, Alternating Aperture PSM (AAPSM) allows for better resolution within other advantages. This paper deals with micro-trench formation during quartz etching. Micro-trench can produce distortion of the light intensity and lead unwanted results on wafer. Several experiments are performed with respective etch conditions; fluorine (F) gas species, gas flow rates, bias powers, and substrate temperatures while other conditions are fixed. Quartz etching is processed with Inductively Coupled Plasma (ICP) system. Etched morphologies are observed by Scanning Electron Microscopy (SEM), Atomic Force Microscopy (AFM), and a surface profiler to select the best condition as functions of etch parameters. Results show that bias power is the most important factors to decide quartz surface morphologies. Finally, mask image is simulated by AIMS system under given condition.

Enhanced capability improvement using OPC pattern generation at Laser lithography

We have developed next generation photmasks with a variety of method and approach including new material, machines and technology. Because enhanced resolution and pattern fidelity are required rapidly in photomask for coping with further advances in optical lithography. Specially Laser Lithography, Alta3500 has low butting error, fast throughput and registration but has a weak point as corner rounding, CD linearity and ID bias against minimum MEEF (Mask Error Enhancement Factor) acquisition and enhanced pattern printability. But we can not help feeling much cost burden and worse productivity problem in the process of advanced photomasks development. Therefore we have to always consider low cost under high precision technology with current machine and material. We need to extend Alta3500 productivity for advanced device and a variety of device types. So we approached Optical Proximity Correction (OPC) among several candidates for helping that kinds of requirement. And we selected Rule Based OPC for helping fast application of correction rule and low mask complexity. We evaluated mainly Serif and Jog pattern for acquiring corner rounding, CD linearity and ID bias improvement at Alta3500. And we made a conclusion that Alta3500 can extend to 0.15(mu) Logic fabrication with implementation of OPC pattern generation. In this paper, details of OPC effects and application for 0.15micrometers devices will be further discussed.

Accuracy of transmittance measurement of inspection machine for semitransparent defect and its detectability

As the wafer design rule is getting smaller, the size and transmittance of the defect on the reticle, especially for the semi-transparent defect, is one of the important factors to be controlled in mask shop. In order to minimize controversy for the accuracy of size and transmittance measurement, we need to define the detection and measurement ability of each inspection machine for the half-tone defect. In this work, we make semi-transparent defects with FIB repair tool, SEIKO, and treat this plate with NaOH. We first investigate the delectability of each inspection machine for the semi-transparent defects according to the size and transmittance increase and accuracy of size measuring tool supported in each inspection machine, KLA, lasertec and ORBOT. We verify the measurement result with CD SEM for the size and AIMS for the transmittance.

Impact of ArF attenuated PSM using multishifter layer (TiN/Si3N4) for next-generation lithography

ArF lithography that is expected the candidate for next generation optical lithography and attenuated Phase Shift Mask (att-PSM) will be adapted for 0.12micrometers design-rule and beyond. For the next-generation lithography, the most important requirement for mask process is enough resolution and good pattern fidelity to generate various critical patterns, of which sizes are below 0.5micrometers main pattern including OPC patterns. In this paper we describe in terms of blank mask properties, mask making process and wafer performance of ArF attenuated Phase Shift Mask (att-OSM) using TiN/Si3N4(abbreviated as TiN/SiN) multi-layer for Next Generation Lithography (NGL). In view point of material, we have evaluated for the applicability of TiN/SiN multi-layer to ArF lithography as compared with non- stoichiometric MoSiON-based single-layer structure. In mask making process, we used Chemically Amplified Resist (CAR) process characteristics and Dry etching system for improvement of enough resolution and pattern fidelity. Also we have investigated wafer performance for ArF att-PSM in terms of process windows as compared with BIM (Binary Intensity Mask) in 120nm D/R real cell pattern and 100nm L/S(Line and Space)D/R pattern, respectively.

Potentialities of sub-100-nm optical lithography of alternating and phase-edge phase-shift mask for ArF lithography

The patterning potentialities of sub-100nm pattern for ArF lithography was evaluated with conventional alternating PSM (alt-PSM) for dense lines and spaces (L/S) and phase edge PSM (PE-PSM) for isolated lines of memory device. In dense L/S pattern,110nm pattern was defined with relatively small depth of focus(DOF) window(~ 0.2 ?m) due to phase error of mask. As pattern sizes was changed from 130nm to 200nm, critical dimension (CD) difference between two neighboring spaces was varied and it was assumed that micro loading effect was occurred in Qz etching. The linearity was guaranteed to dense L/S of 110nm and isolated line of 90nm, and Iso-Dense bias was controlled within 15nm. The 60nm and 70nm isolated lines of PE-PSM ware defined with good process windows in the case of OA_X size(X-direction size of Cr open area) of 0.5 ?m. The 55nm isolated line was also defined. The pattern shift of isolated lines was occurred with 4~7nm as phase of mask was varies within 190 ~ 200 ° . Though the alt-PSM with high numerical aperture (NA) for ArF lithography was strong candidates for sub-1 OOnm lithography of memory device, the issues of mask fabrication such as tighter phase control and minimizing etch loading effect would be big obstacles. On the contrary, there were many possibilities of sub-100nm patterning in PE-PSM with good process windows, however tighter control of pattern shift due to phase error must be studied intensively.

Double Step process for manufacturing reticle to reduce gate CD variation

In low k1 lithography, reticle quality decides the process capability. Therefore, we must minimize CD errors on the reticle plate. Double Step process (DS process) is a unique method to improve CD uniformity of line patterns on the active region of poly layer reticle. In DS process, poly layer design is divided into the active region and the non-active region. And then, these two regions are processed individually. By using this procedure, pattern density variation across the reticle plate is reduced when making line patterns on the active region. As a result, the loading effect of the dry etching process reduced, and CD uniformity of these patterns can be improved. Using this technique of reticle fabrication, CD uniformity could be improved. Particularly, the range of CD variation of line patterns in logic cells was drastically reduced from 29nm to 20nm.