Howard R. Test

Probing and wire bonding of aluminum capped copper pads

Microelectronics manufacturing has started to develop and, in some cases, ramp wafer fabrication processes using copper interconnects as the preferred metallurgy. Since bare copper wire bonding has not been accepted as a reliable and high throughput process, integrated circuit manufacturers are applying an aluminum cap on top of the copper to facilitate bonding. Past studies carried out on aluminum-based silicon wafers concluded that scrub damage on bond pads due to multiprobe testing should be minimized in order to maintain high assembly yields and a robust bond process. Texas Instruments has carried out an experimental study that compares wire-bonding characteristics of probed aluminum capped and etched aluminum bond pads. Wafers were probed multiple times to generate pads with measured damage ranging from 10-45% of total pad area. Analyses on bonded units include percent of Au-Al intermetallics formed, ball shear, wire pull, and underlying pad damage. The paper will highlight the differences found between the two methodologies and recommend basic changes that will enhance the assembly process of Al-capped copper bond pads.

Trends in semiconductor packaging, a merchant house view

Semiconductor packaging is being driven in two major directions by the demand for increased system operating speeds and higher functional density. Most prominent is the trend toward higher functional integration on the die, resulting in both a larger die size and decreased feature size. The other major trend is the mechanical integration of multiple devices in a single package. These trends require improved package-design methods that include electrical and thermomechanical modeling, improved data on material properties that drive package reliability, and novel methods of reliability testing to meet the very low defect levels that will be required in next-generation electronic equipment.<<ETX>>