Gonzalo Amador

Wafer level packaging of a tape flip-chip chip scale packages

Abstract The advent of chip scale packages (CSPs) within the semiconductor community has led to the development of wafer scale assembly (WSA) or wafer level packaging (WLP) manufacturing in order to raise assembly efficiencies and lower operating costs. Texas Instruments (TI) has developed a unique WLP process for forming flip-chip, ball grid array packages. The die inputs and outputs of the TI CSP are connected through solder bumps to a polyimide film interposer. Solder balls on the other side of the interposer complete the electrical connection to a customer’s printed circuit board. A wafer-sized array of interposers designed to match the pattern of dies on a wafer is aligned and reflowed to a bumped wafer. The TI WLP process is completed by singulating the CSPs from the wafer using standard wafer saw equipment. Attachment of the interposer to the die as well as applying the die and board level solder bumps are carried out in wafer form using a new bumping technology called Tacky Dots™. Tacky Dots uses an array of sticky dots formed in a photosensitive coating laminated to a polyimide film for transferring and attaching solder spheres to semiconductor substrates. A populated film containing one solder sphere per Tacky Dot is positioned over the wafer or interposer and lowered until the spheres contact the pads. A reflow process transfers the spheres from the film to the wafer or interposer and the film is removed once the spheres have frozen. This paper illustrates the process steps and custom equipment developed for forming the TI CSP. The strategic use of finite element modeling for optimizing the design of the package is outlined. The paper concludes by summarizing the current package level reliability results.

Tacky Dots/sup TM/ transfer of solder spheres for flip chip and electronic package applications

The use of preformed solder spheres for bumping flip chip wafers has not gained wide acceptance within the semiconductor industry. Due in part to equipment shortcomings, solder sphere transfer until now was commonly limited to spheres 300 /spl mu/m or larger, much too large for the typical flip chip applications of 150 /spl mu/m or less. To address this need, Texas Instruments and DuPontB have jointly developed a process for transferring 127 /spl mu/m diameter solder spheres to wafers. The process, called Tacky Dots/sup TM/, forms are array of sticky or tacky dots in a photoimageable adhesive coating. Solder spheres sprinkled on the adhesive coating are then captured and retained by the tacky dots until the spheres are aligned and reflowed to the wafer. This paper describes the equipment and processes developed for bumping wafers using Tacky Dots/sup TM/. The compliant polyimide sheet used in Tacky Dots/sup TM/ required a new and unique equipment design that aligns the solder spheres to the wafer and then reflows the solder without moving the wafer. Post reflow analysis of the bumped dies before and after environmental testing is reviewed. Tests conducted with a leadless chip carrier package design are also reviewed to demonstrate the capability of Tacky Dots/sup TM/ at transferring spheres to electronic packages and substrates other than wafers.

Tacky Dots/sup TM/ technology for flip chip and BGA solder bumping

As the electronics market moves toward higher performance Integrated Circuits (ICs), each IC requires larger numbers of Inputs and Outputs (I/Os). This has resulted in a strong need in the marketplace for a low cost, high resolution method for placing controlled volumes of solder (or other metal alloys) on bond pads of ICs and area array semiconductor packages, such as Ball Grid Arrays (BGAs), and Chip Scale Packages (CSPs). To satisfy this need, DuPont has developed the concept of Tacky Dots/sup TM/, which utilizes proprietary technology in photoimageable adhesives to form a pattern of tacky areas, which are subsequently populated with conductive particles and then transferred to ICs or packages. DuPonts expertise and effort have been focused on developing a systems approach to the front end population process, while working closely with Texas Instruments who has developed technology to enable the effective transfer of the conductive particles. This paper contains details of the imaging and population technology as well as a discussion of the overall progress of this new wafer bumping process.