Hubert Benzel

Next generation pressure sensors in surface micromachining technology

One of the first MEMS products - the pressure sensor - has still room for innovation. We report a completely new pressure sensor generation based on a novel surface micromachining technology. Using porous silicon the membrane fabrication can be monolithically integrated with high synergy in an analog/digital semiconductor process suited for high volume production in an IC-fabrication facility. Only two mask layers and one electrochemical etching step are inserted at the beginning of a standard IC-process to transform the epitaxial silicon layer from the electronic process into a monocrystalline membrane with a vacuum cavity under it.

Novel Technology for Capacitive Pressure Sensors with Monocrystalline Silicon Membranes

We report on a novel surface micromachining technology for the fabrication of capacitive absolute pressure sensors. The pressure sensitive membrane is formed by single crystal silicon enabling excellent long term stability. The membrane formation is based on the Advanced Porous Silicon Membrane (APSM) process [1], which is currently applied to piezoresistive transducers. Expanding this technology to capacitive transduction allows for a greater flexibility in tailoring the sensor properties to specific applications [2]. This expansion is implemented by adding a poly-Si counter electrode layer on top of the membrane in a surface micromachining step. Since only front side processing on standard silicon substrates is used, this method is very cost-efficient and fully CMOS-compatible, enabling monolithic integration of circuitry.

Monocrystalline Si membranes for pressure sensors fabricated by a novel surface micromachining process using porous silicon

We developed a novel surface micromachining process to fabricate monocrystalline silicon membranes covering a vacuum cavity without any additional sealing steps. Heart of the process is anodic etching of porous silicon, annealing and epitaxial growth. The porous silicon layer consists of two parts, a starting mesoporous silicon layer with low surface porosity and a nanoporous silicon layer with a high porosity. The following annealing step removes native oxide within the later cavity, and the surface is sealed for the subsequent epitaxial layer deposition. The observed stacking fault density in the epitaxial layer about 1E5 cm-2. The temperature budget of the following ASIC-process leads to a complete transformation of the nanoporous silicon layer into a large cavity. The whole structure can be used as a pressure sensor. The estimated pressure in the cavity is smaller than 1 mbar. First integrated pressure sensors have been fabricated using this process. The sensors show a good linearity over the whole pressure range of 200 mbar to 1000 mbar. This novel process has several advantages compared to already published processes. It is a “MEMS first” process, which means that after the epitaxial growth the surface of the wafer is close to a standard wafer surface. Due to full IC compatibility, standard ASIC processes are possible after the fabrication of the membrane. The use of porous silicon enables a high degree of geometrical freedom in the design of membranes compared to standard bulk micromachining (KOH, TMAH). The monocrystalline membranes can be fabricated with surface micromachining without any additional sealing or backside processing steps.