Hyung Hwan Kim

Fully integrated and functioned 44nm DRAM technology for 1GB DRAM

44 nm feature sized 8F2 1Gb DRAM is fully integrated and functioned for the first time with the smallest cell size of 0.015 um2. A novel cell-transistor structure and new DRAM process technologies are developed. In order to control the threshold voltage uniformity and body-bias sensitivity of saddle-fin cell-transistor, the channel doping profile and saddle-fin geometric dependency were analytically expressed with experimental data. The weak fin height dependency on cell-VT diminishes the burden of the saddle-fin patterning processes. And the low body-bias sensitivity of the saddle-fin cell-transistor leads wide tWR (write recovery time) margins. Cylinder-like MIM cell capacitor with ZAZ dielectric is exploited on cell capacitor. Copper implemented triple-metal layer and WN barrier-metal techniques were developed to decrease chip size.

Development of High Selectivity Phosphoric Acid and its Application to Flash STI Pattern

In a manufacturing semiconductor device, silicon nitride (Si3N4) and silicon oxide (SiO2) materials are typically and widely used as dielectric materials. In general, phosphoric acid is used for etch of silicon nitride film. The etch rate of phosphoric acid decreases as etch time increases and phosphoric acid has low selectivity against oxide layer. Therefore, phosphoric acid of high selectivity between silicon nitride and silicon oxide without particle generation is needed to remove silicon nitride film. Especially, high selectivity between nitride and oxide is important for flash device application since both nitride and oxide materials exist during nitride remove process in flash Shallow Trench Isolation (STI) pattern. Therefore, control of EFH through high selectivity nitride etching is important for improvement of device performance and we developed Phosphoric Acid with high selectivity between nitride and oxide without particle generation for further devices.