Hyungkwang Lim

Threshold resistive and capacitive switching behavior in binary amorphous GeSe

A threshold switching (TS) event in a binary amorphous GeSe film placed between Pt top and bottom electrodes was examined. This GeSe film exhibits fast (<40 ns) TS behavior. The observed TS of the resistance was found to be accompanied with the TS of the capacitance. A mechanism for the TS of the GeSe film was suggested by revisiting the previous controversy about the thermal versus non-thermal electronic mechanism. The non-thermal electronic mechanism envisaging the double-injection of electronic carriers can qualitatively account for the measured threshold resistive and capacitive switching, whereas the TS behavior simulated using the thermal mechanism is inconsistent with the experimental observation.

Short-term memory of TiO2-based electrochemical capacitors: empirical analysis with adoption of a sliding threshold

Chemical synapses are important components of the large-scaled neural network in the hippocampus of the mammalian brain, and a change in their weight is thought to be in charge of learning and memory. Thus, the realization of artificial chemical synapses is of crucial importance in achieving artificial neural networks emulating the brains functionalities to some extent. This kind of research is often referred to as neuromorphic engineering. In this study, we report short-term memory behaviours of electrochemical capacitors (ECs) utilizing TiO2 mixed ionic-electronic conductor and various reactive electrode materials e.g. Ti, Ni, and Cr. By experiments, it turned out that the potentiation behaviours did not represent unlimited growth of synaptic weight. Instead, the behaviours exhibited limited synaptic weight growth that can be understood by means of an empirical equation similar to the Bienenstock-Cooper-Munro rule, employing a sliding threshold. The observed potentiation behaviours were analysed using the empirical equation and the differences between the different ECs were parameterized.

Electric-field-induced shift in the threshold voltage in LaAlO3/SrTiO3 heterostructures.

The two-dimensional electron gas (2DEG) at the interface between insulating LaAlO3 and SrTiO3 is intriguing both as a fundamental science topic and for possible applications in electronics or sensors. For example, because the electrical conductance of the 2DEG at the LaAlO3/SrTiO3 interface can be tuned by applying an electric field, new electronic devices utilizing the 2DEG at the LaAlO3/SrTiO3 interface could be possible. For the implementation of field-effect devices utilizing the 2DEG, determining the on/off switching voltage for the devices and ensuring their stability are essential. However, the factors influencing the threshold voltage have not been extensively investigated. Here, we report the voltage-induced shift of the threshold voltage of Pt/LaAlO3/SrTiO3 heterostructures. A large negative voltage induces an irreversible positive shift in the threshold voltage. In fact, after the application of such a large negative voltage, the original threshold voltage cannot be recovered even by application of a large positive electric field. This irreversibility is attributed to the generation of deep traps near the LaAlO3/SrTiO3 interface under the negative voltage. This finding could contribute to the implementation of nanoelectronic devices using the 2DEG at the LaAlO3/SrTiO3 interface.

Reliability of neuronal information conveyed by unreliable neuristor-based leaky integrate-and-fire neurons: a model study

We conducted simulations on the neuronal behavior of neuristor-based leaky integrate-and-fire (NLIF) neurons. The phase-plane analysis on the NLIF neuron highlights its spiking dynamics – determined by two nullclines conditional on the variables on the plane. Particular emphasis was placed on the operational noise arising from the variability of the threshold switching behavior in the neuron on each switching event. As a consequence, we found that the NLIF neuron exhibits a Poisson-like noise in spiking, delimiting the reliability of the information conveyed by individual NLIF neurons. To highlight neuronal information coding at a higher level, a population of noisy NLIF neurons was analyzed in regard to probability of successful information decoding given the Poisson-like noise of each neuron. The result demonstrates highly probable success in decoding in spite of large variability – due to the variability of the threshold switching behavior – of individual neurons.

Leaky Integrate-and-Fire Neuron Circuit Based on Floating-Gate Integrator

The artificial spiking neural network (SNN) is promising and has been brought to the notice of the theoretical neuroscience and neuromorphic engineering research communities. In this light, we propose a new type of artificial spiking neuron based on leaky integrate-and-fire (LIF) behavior. A distinctive feature of the proposed FG-LIF neuron is the use of a floating-gate (FG) integrator rather than a capacitor-based one. The relaxation time of the charge on the FG relies mainly on the tunnel barrier profile, e.g., barrier height and thickness (rather than the area). This opens up the possibility of large-scale integration of neurons. The circuit simulation results offered biologically plausible spiking activity (<100 Hz) with a capacitor of merely 6 fF, which is hosted in an FG metal-oxide-semiconductor field-effect transistor. The FG-LIF neuron also has the advantage of low operation power (<30 pW/spike). Finally, the proposed circuit was subject to possible types of noise, e.g., thermal noise and burst noise. The simulation results indicated remarkable distributional features of interspike intervals that are fitted to Gamma distribution functions, similar to biological neurons in the neocortex.

Scalable excitatory synaptic circuit design using floating gate based leaky integrators

We propose a scalable synaptic circuit realizing spike timing dependent plasticity (STDP)—compatible with randomly spiking neurons. The feasible working of the circuit was examined by circuit simulation using the BSIM 4.6.0 model. A distinguishable feature of the circuit is the use of floating-gate integrators that provide the compact implementation of biologically plausible relaxation time scale. This relaxation occurs on the basis of charge tunneling that mainly relies upon area-independent tunnel barrier properties (e.g. barrier width and height) rather than capacitance. The circuit simulations feature (i) weight-dependent STDP that spontaneously limits the synaptic weight growth, (ii) competitive synaptic adaptation within both unsupervised and supervised frameworks with randomly spiking neurons. The estimated power consumption is merely 34 pW, perhaps meeting one of the most crucial principles (power-efficiency) of neuromorphic engineering. Finally, a means of fine-tuning the STDP behavior is provided.