Ik-Seok Yang

A highly area-efficient controller for capacitive touch screen panel systems

In this paper, a highly area-efficient controller for capacitive touch screen panels (TSPs) is proposed. The proposed controller uses a 10-bit successive approximation register analog-to-digital converter (SAR ADC) with an adder to compensate for the capacitance variation in the TSP and for the offset voltage variation in the charge amplifier of the sensing circuit. By using the proposed compensation method, the area of the controller can be reduced by 90.3% of the area of the conventional controllers. The measurement results showed that the signal-to-noise ratio (SNR) of the controller increases from 12.5 to 21.3 dB after compensation. Also, its spatial jitter decreases from ±1.5 to ±0.46 mm, which is 7% of the sensor pitch of 8 mm.

A touch controller using differential sensing method for on-cell capacitive touch screen panel systems

A touch controller is proposed for on-cell capacitive touch screen panel systems. The proposed IC adopts the differential sensing method to enhance the dynamic range of sensing voltage and to be robust to display noise. The measurement results show that the maximum reporting rate, jitter tolerance, and signal-to-noise ratio (SNR) are 140 Hz, ±0.3 mm, and 12 dB, respectively, when evaluated with a 13.3-inch wide extended graphics array (WXGA) liquid crystal display (LCD) panel with the on-cell touch screen. The proposed IC fabricated via 0.35 μm CMOS process technology occupies a silicon area of 4 mm × 5 mm and consumes a power of 19 mW when the supply voltage is 3.3 V.

SOI high voltage integrated circuit technology for plasma display panel drivers

We have developed 150 V and 250 V high voltage integrated circuit technologies using high performance extended drain MOSFET (EDMOSFET) and dielectric isolation (DI) technology for data and scan driving LSIs of color AC plasma display panel systems for an application of HDTV. The EDMOSFETs have invariant channel length despite process variation because of a self-aligned structure. This results in smaller chip area for the developed driver LSIs than that of conventional driver LSIs using LDMOSFETs. The data driver LSI with maximum driving current of 50 mA and 60 output channels can be applied to PDP systems with a fast addressing time of 0.7 /spl mu/s. The scan driver LSI for large-size AC PDPs has a maximum driving current of 500 mA for both the source and the sink.

Reconfigurable 2D cMUT-ASIC arrays for 3D ultrasound image

This paper describes the design and implementations of the complete 2D capacitive micromachined ultrasound transducer electronics and its analog front-end module for transmitting high voltage ultrasound pulses and receiving its echo signals to realize 3D ultrasound image. In order to minimize parasitic capacitances and ultimately improve signal-to- noise ratio (SNR), cMUT has to be integrate with Tx/Rx electronics. Additionally, in order to integrate 2D cMUT array module, significant optimized high voltage pulser circuitry, low voltage analog/digital circuit design and packaging challenges are required due to high density of elements and small pitch of each element. We designed 256(16x16)- element cMUT and reconfigurable driving ASIC composed of 120V high voltage pulser, T/R switch, low noise preamplifier and digital control block to set Tx frequency of ultrasound and pulse train in each element. Designed high voltage analog ASIC was successfully bonded with 2D cMUT array by flip-chip bonding process and it connected with analog front-end board to transmit pulse-echo signals. This implementation of reconfigurable cMUT-ASIC-AFE board enables us to produce large aperture 2D transducer array and acquire high quality of 3D ultrasound image.

P‐16: A Scan Driver Circuit Using Transparent Thin Film Transistors

paper, we proposed two types of integrated scan driver circuits using only n-channel zinc-oxide (ZnO) thin film transistors (TFTs). One is the scan driver circuit for low-power consumption and the other scan driver is for robustness to threshold voltage and mobility variation. The proposed scan driver for low-power consumption is embedding level shifter and its power consumption was 1.4 mW. The scan driver for robustness used positive feedback circuits as pull-up devices. By simulation results, the proposed scan driver has robustness in the frequency, temperature, and process variation compared to conventional scan drivers. Also, two proposed scan drivers have advantages of full swing output range from VDD to VSS.

An improvement of SOA on n-channel SOI LDMOS transistors

A new n-channel SOI LDMOS transistor which has an n/sup +/ drain structure with a buffer layer is proposed. The electric field of n/sup +/ drain region can be reduced by 68% in this structure compared with conventional LDMOSFETs. The generation of hole current, which turns on a parasitic bipolar transistor and causes the second breakdown, can be suppressed. This device was fabricated in the 0.8 /spl mu/m CMOS process on a SOI wafer and the buffer layer doping concentration was optimized by simulations. From the measurement results, it was confirmed that the second breakdown voltage at V/sub gs/=20 V was improved from 35 V to 80 V in the proposed structure. Also, this device has a breakdown voltage of 240 V and a specific on-resistance of 16.9 m/spl Omega//spl middot/cm/sup 2/, which is the best reported performance for this voltage range.

Inverters Using Only N-Type Indium Gallium Zinc Oxide Thin Film Transistors for Flat Panel Display Applications

Two inverter architectures are proposed to be integrated on panels for flat panel display applications using only n-type amorphous indium gallium zinc oxide (IGZO) thin film transistors (TFTs). The proposed cross-coupled (CC) inverter uses the positive feedback effect of its CC structure to reduce the static current and increase the output voltage swing when using depletion mode n-type amorphous IGZO TFTs. The other proposed cross-coupled and bootstrapping (CCB) inverter also uses the cross-coupled structure and includes a capacitor for the bootstrapping effect to increase the operating frequency. The measured results show that the output voltage swing of the proposed CC inverter is from 0 to 14.50 V and that of the CCB inverter is from 0.15 to 14.57 V when VDD is 15 V at 20 kHz and the load capacitance is 103.0 pF. The power consumption of the CC and CCB inverters are 1.4 and 2.5 mW, respectively, which are 29.3 and 53.4% of the power consumption of the ratioed inverter.

DC-DC Converters Using Indium Gallium Zinc Oxide Thin Film Transistors for Mobile Display Applications

DC–DC converters integrated into a panel are proposed for mobile display applications using indium gallium zinc oxide (IGZO) thin film transistors (TFTs). The proposed positive DC–DC converter uses cross-coupled and diode-connected structures for a high output voltage and a high power efficiency, while the proposed negative DC–DC converter uses also a cross-coupled structure but with separated pumping capacitors for a negative output voltage and a high power efficiency. The simulated results show that the output voltage and power efficiency are 21.3 V and 69.5% for the positive DC–DC converter and -5.1 V and 56.1% for the negative DC–DC converter, respectively, at a supply voltage of 10 V and a load current of 250 µA. The measured results show that the output voltage and power efficiency of the proposed positive DC–DC converter are 20.8 V and 66.6%, respectively, under the same conditions as those for the simulated results.

Transparent Pixel Circuit with Threshold Voltage Compensation Using ZnO Thin-Film Transistors for Active-Matrix Organic Light Emitting Diode Displays

A transparent pixel circuit with a threshold voltage compensating scheme using ZnO thin-film transistors (TFTs) for active-matrix organic light emitting diode (AMOLED) displays is proposed. This circuit consists of five n-type ZnO TFTs and two capacitors and can compensate for the threshold voltage variation of ZnO TFTs in real time. From simulation results, the maximum deviation of the emission current of the pixel circuit with a threshold voltage variation of ±1 V is determined to be less than 10 nA. From measurement results, it is verified that the maximum deviation of measured emission currents with measurement position in a glass substrate is less than 15 nA in a higher current range, and the deviation of emission current with time is less than 3%.

27.1: An Area-Effective Source Driver with 12-Bit Linear DAC for Large-Size TFT-LCDs

An area-effective 12-bit linear digital-to-analog converter (DAC) of source driver is proposed for large-Size TFT-LCDs. The proposed DAC is composed of resistor-string DAC for MSB 6-bit, current DAC for LSB 6-bit and interpolation amplifiers. To reduce the area of DAC, 6-bit current DAC is designed using low voltage devices. We designed and fabricated the source driver with the proposed DAC using 0.13 μm process with 2.5 V low voltage devices and 16 V high voltage devices. One channel layout area is 17.5 μm × 600 μm, which is shrunk by 15% compared with that of 8-bit resistor-string DAC. The experimental results show that the output voltage deviation is less than 3.5 mV.