Imen Mhedhbi

Mask motion adaptive medical image coding

We combine a mask motion detection algorithm with both the WAAVES adaptive compression algorithm (resulting into MMWaaves) and a JPEG2000 coder (resulting into MMJPEG2000) for the compression of medical images sequences. Several images were compressed using Waaves, MMWaaves, and MMJPEG2000 to observe which tool provided the best visual quality while maintaining a high compression ratio. Compared to Waaves, the MMWaaves achieved compression gains up to 40% for CT scans and 50 % for MRI. In addition, the SSIM values attributed to the compressed images were between 0.96 and 0.988 while the PSNR values were higher than 42. In addition MMWaaves attained a superior performance than MMJPEG2000.

SmartEEG: A multimodal tool for EEG signals

In this paper we present an hardware realisation for an image coder used in the SmartEEG project. This collaborative project has the aim of the conception of a multimodal tool for EEG signal to allow transmission of a complete examination of a patient. We show that we can expect good performance on a FPGA board for the time consuming part of this tool that is the image coder.

FPGA vs DSP: A throughput and power efficiency comparison for Hierarchical Enumerative Coding

A comparative study of Hierarchical Enumerative Coding (HENUC) for FPGA and DSP implementation is presented. HENUC is a lossless fixed-point entropy coding algorithm employed by a wavelet-based image encoder, which provides good compression performance for the locally stationary image data. It has been implemented in our previous work on an Alteras 40nm Stratix IV EP4SGX230 FPGA as a hardware IP accelerator in a Nios II based system. In this paper, we implemented it on a Texas Instrumentss (TI) 40nm Integra C6A816x/AM389x DSP. We present experimental results regarding the execution time, resource utilization and core power consumption of the two implementations and we evaluate their throughput and power efficiency. Our results show that a highly parallelized FPGA implementation at 100MHz is 12.3× faster than a highly tuned DSP implementation running at 1.5 GHz and consumes 2.4× less power, they also show that the proposed algorithm is more suitable for hardware implementation.

A novel approach using WAAVES coder for the EEG signal compression

In this paper, we propose a new approach to compress Electroencephalogram (EEG) signals using the WAAVES compression algorithm and Independent Component Analyses (ICA). Firstly, ICA is applied to the 1D-EEG signals as a preprocessing stage to uncorrelate signals. Then, the output of the ICA is scaled and reformatted into a 2D-matrix to be compressed as an image using the WAAVES coder. This scheme gives a better compression ratio and a better Percentage Root-Mean-Squared Difference (PRD). Our work increases the compression efficiency (CR = 36.60) while reserving the EEG signal diagnostic quality (PRD=4.73).

A new integer energy activity measure for parallel bit plane coding

We propose a reduced complexity Adaptive scanning algorithm (LPEAM) coupled with parallel bit plane coding for HENUC image compression. Typically, optimization of data memory layout and address register assignment allows reducing both execution time and code size of programs. The average efficiency improvement of LPEAM is around 50% over the original coder while keeping a good quality with an SSIM up to 0.985. In addition, parallel encoding is operating at higher processing speed up to 5 times more than the basis solution.

Multithreading parallel bit plane coding

Bit Plane coding constitutes an important component of the Hierarchical Enumerative Coding (HENUC). This paper proposes a novel multithreaded processing paradigm for parallel bit plane coding that achieves near perfect parallel processing scalability, at least over the 4 logical processors. It is a very high speed and efficient structure that is capable of encoding all bits of the wavelet coefficient in only one scan, and largely decreases the memory requirement; Experimental results show that the architecture can encode about 5 times more than the sequential encoding for the coefficient with 8 bits and it requires %30 bits memory less than the basis solution.