In Gyoo Kim

Low-voltage high-performance silicon photonic devices and photonic integrated circuits operating up to 30 Gb/s

We present high performance silicon photonic circuits (PICs) defined for off-chip or on-chip photonic interconnects, where PN depletion Mach-Zehnder modulators and evanescent-coupled waveguide Ge-on-Si photodetectors were monolithically integrated on an SOI wafer with CMOS-compatible process. The fabricated silicon PIC(off-chip) for off-chip optical interconnects showed operation up to 30 Gb/s. Under differential drive of low-voltage 1.2 V(pp), the integrated 1 mm-phase-shifter modulator in the PIC(off-chip) demonstrated an extinction ratio (ER) of 10.5dB for 12.5 Gb/s, an ER of 9.1dB for 20 Gb/s, and an ER of 7.2 dB for 30 Gb/s operation, without adoption of travelling-wave electrodes. The device showed the modulation efficiency of V(π)L(π) ~1.59 Vcm, and the phase-shifter loss of 3.2 dB/mm for maximum optical transmission. The Ge photodetector, which allows simpler integration process based on reduced pressure chemical vapor deposition exhibited operation over 30 Gb/s with a low dark current of 700 nA at -1V. The fabricated silicon PIC(intra-chip) for on-chip (intra-chip) photonic interconnects, where the monolithically integrated modulator and Ge photodetector were connected by a silicon waveguide on the same chip, showed on-chip data transmissions up to 20 Gb/s, indicating potential application in future silicon on-chip optical network. We also report the performance of the hybrid silicon electronic-photonic IC (EPIC), where a PIC(intra-chip) chip and 0.13μm CMOS interface IC chips were hybrid-integrated.

Enhanced frequency response associated with negative photoconductance in an InGaAs/InAlAs avalanche photodetector

We report an InAlAs/InGaAs avalanche photodetector with the photocurrent–voltage characteristic exhibiting a negative conductance region. The frequency response of a device exhibits the internal rf-gain effect in the avalanche region, and the gain peak occurs at progressively higher frequencies as the applied voltage increases. The pulse response experiment in the time domain characterizes the formation process of the space-charge wave signal near the threshold voltage in the avalanche region. The experimental result, displaying a multivalued bandwidth curve with respect to the current-gain, shows that the avalanche process does not limit the speed of the avalanche photodetector, in contrast to the conventional one.

High-modulation efficiency silicon Mach-Zehnder optical modulator based on carrier depletion in a PN Diode

We present a high phase-shift efficiency Mach-Zehnder silicon optical modulator based on the carrier-depletion effect in a highly-doped PN diode with a small waveguide cross-sectional area. The fabricated modulator show a V(pi)L(pi) of 1.8 V x cm and phase shifter loss of 4.4 dB/mm. A device using a 750 microm-long phase-shifter exhibits an eye opening at 12.5 Gbps with an extinction ratio of 3 dB. Also, an extinction ratio of 7 dB is achieved at 4 Gbps for a device with a 2 mm-long phase shifter. Further enhancement of the extinction ratio at higher operating speed can be achieved using a travelling-wave electrode design and the optimal doping.

High-sensitivity 10 Gbps Ge-on-Si photoreceiver operating at λ ~1.55 μm

We present a high-sensitivity photoreceiver based on a vertical- illumination-type 100% Ge-on-Si photodetector. The fabricated p-i-n photodetector with a 90 microm-diameter mesa shows the -3 dB bandwidth of 7.7 GHz, and the responsivity of 0.9 A/W at lambda approximately 1.55 microm, corresponding to the external quantum efficiency of 72%. A TO-can packaged Ge photoreceiver exhibits the sensitivity of -18.5 dBm for a BER of 10(-12) at data rate of 10 Gbps. This result proves the capability of a cost-effective 100% Ge-on-Si photoreceiver which can readily replace the III-V counterparts for optical communications.

Compact-sized high-modulation-efficiency silicon Mach-Zehnder modulator based on a vertically dipped depletion junction phase shifter for chip-level integration.

We present small-sized depletion-type silicon Mach-Zehnder (MZ) modulator with a vertically dipped PN depletion junction (VDJ) phase shifter based on a CMOS compatible process. The fabricated device with a 100 μm long VDJ phase shifter shows a VπLπ of ∼0.6  V·cm with a 3 dB bandwidth of ∼50  GHz at -2  V bias. The measured extinction ratios are 6 and 5.3 dB for 40 and 50  Gb/s operation under 2.5  Vpp differential drive, respectively. On-chip insertion loss is 3 dB for the maximum optical transmission. This includes the phase-shifter loss of 1.88  dB/100  μm, resulting mostly from the extra optical propagation loss through the polysilicon-plug structure for electrical contact, which can be readily minimized by utilizing finer-scaled lithography nodes. The experimental result indicates that a compact depletion-type MZ modulator based on the VDJ scheme can be a potential candidate for future chip-level integration.

High-performance photoreceivers based on vertical-illumination type Ge-on-Si photodetectors operating up to 43 Gb/s at λ~1550nm.

We present high-sensitivity photoreceivers based on a vertical- illumination-type 100% Ge-on-Si p-i-n photodetectors (PDs), which operate up to 50 Gb/s with high responsivity. A butterfly-packaged photoreceiver using a Ge PD with 3-dB bandwidth (f(-3dB)) of 29 GHz demonstrates the sensitivities of -10.15 dBm for 40 Gb/s data rate and -9.47 dBm for 43 Gb/s data rate, at BER of 10(-12) and λ ~1550 nm. Also a photoreceiver based on a Ge PD with f(-3dB)~19 GHz shows -14.14 dBm sensitivity at 25 Gb/s operation. These results prove the high performance levels of vertical-illumination type Ge PDs ready for practical high-speed network applications.

Single-chip photonic transceiver based on bulk-silicon, as a chip-level photonic I/O platform for optical interconnects

When silicon photonic integrated circuits (PICs), defined for transmitting and receiving optical data, are successfully monolithic-integrated into major silicon electronic chips as chip-level optical I/Os (inputs/outputs), it will bring innovative changes in data computing and communications. Here, we propose new photonic integration scheme, a single-chip optical transceiver based on a monolithic-integrated vertical photonic I/O device set including light source on bulk-silicon. This scheme can solve the major issues which impede practical implementation of silicon-based chip-level optical interconnects. We demonstrated a prototype of a single-chip photonic transceiver with monolithic-integrated vertical-illumination type Ge-on-Si photodetectors and VCSELs-on-Si on the same bulk-silicon substrate operating up to 50 Gb/s and 20 Gb/s, respectively. The prototype realized 20 Gb/s low-power chip-level optical interconnects for λ ~ 850 nm between fabricated chips. This approach can have a significant impact on practical electronic-photonic integration in high performance computers (HPC), cpu-memory interface, hybrid memory cube, and LAN, SAN, data center and network applications.

Silicon photonic receiver and transmitter operating up to 36 Gb/s for λ~1550 nm

We present the hybrid-integrated silicon photonic receiver and transmitter based on silicon photonic devices and 65 nm bulk CMOS interface circuits operating over 30 Gb/s with a 10(-12) bit error rate (BER) for λ ~1550nm. The silicon photonic receiver, operating up to 36 Gb/s, is based on a vertical-illumination type Ge-on-Si photodetector (Ge PD) hybrid-integrated with a CMOS receiver front-end circuit (CMOS Rx IC), and exhibits high sensitivities of -11 dBm, -8 dBm, and -2 dBm for data rates of 25 Gb/s, 30 Gb/s and 36 Gb/s, respectively, at a BER of 10(-12). The measured energy efficiency of the Si-photonic receiver is 2.6 pJ/bit at 25 Gb/s with an optical input power of -11 dBm, and 2.1 pJ/bit at 36 Gb/s with an optical power of -2 dBm. The hybrid-integrated silicon photonic transmitter, comprised of a depletion-type Mach-Zehnder modulator (MZM) and a CMOS driver circuit (CMOS Tx IC), shows better than 5.7 dB extinction ratio (ER) for 25 Gb/s, and 3 dB ER for 36 Gb/s. The silicon photonic transmitter achieves the data transmission with less than 10(-15) BER at 25 Gb/s, 10(-14) BER at 28 Gb/s, and 6 x 10(-13) BER with the energy efficiency of ~6 pJ/bit at 30 Gb/s.

35 GHz Ge p-i-n photodetectors implemented using RPCVD

Vertical Ge photodetectors were fabricated on silicon using RPCVD showing bandwidth of 35 GHz at -3 V, dark current of 30 nA, and responsivity of 0.47 A/W for 20 mum-diameter detectors.

High performance Ge-on-Si avalanche photodetector

We present high performance vertical-illumination type Ge-on-Si avalanche photodetectors and photoreceiver modules operating up to 25 Gb/s. The Ge avalanche photodetectors were grown on a bulk-silicon wafer by RPCVD, and fabricated with CMOS-compatible process. The fabricated devices show a -3dB bandwidth greater than 13 GHz at operational biases (gain> 20) for λ ~ 1550 nm. The measured maximum gain-bandwidth (GB) product is ~ 493 GHz. Two types of Ge-on-Si APD receiver modules exhibit high sensitivities of better than –20.7 dBm for a 25 Gb/s operation at a BER = 10-12 and λ ~ 1310 nm, and –27.75 dBm for a 10 Gb/s operation at a BER = 10-12 and λ ~ 1550nm, respectively.