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Dive into the research topics where Ki-Seok Jang is active.

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Featured researches published by Ki-Seok Jang.


Optics Express | 2011

Low-voltage high-performance silicon photonic devices and photonic integrated circuits operating up to 30 Gb/s

Gyungock Kim; Jeong Woo Park; In Gyoo Kim; Sang Hoon Kim; Sang-Gi Kim; Jong Moo Lee; Gun Sik Park; Jiho Joo; Ki-Seok Jang; Jin Hyuk Oh; Sun Ae Kim; Jong-Hoon Kim; Jun Young Lee; Jong Moon Park; Do-Won Kim; Deog-Kyoon Jeong; Moon-Sang Hwang; Jeong-Kyoum Kim; Kyu-Sang Park; Hankyu Chi; Hyun-Chang Kim; Dong-Wook Kim; Mu Hee Cho

We present high performance silicon photonic circuits (PICs) defined for off-chip or on-chip photonic interconnects, where PN depletion Mach-Zehnder modulators and evanescent-coupled waveguide Ge-on-Si photodetectors were monolithically integrated on an SOI wafer with CMOS-compatible process. The fabricated silicon PIC(off-chip) for off-chip optical interconnects showed operation up to 30 Gb/s. Under differential drive of low-voltage 1.2 V(pp), the integrated 1 mm-phase-shifter modulator in the PIC(off-chip) demonstrated an extinction ratio (ER) of 10.5dB for 12.5 Gb/s, an ER of 9.1dB for 20 Gb/s, and an ER of 7.2 dB for 30 Gb/s operation, without adoption of travelling-wave electrodes. The device showed the modulation efficiency of V(π)L(π) ~1.59 Vcm, and the phase-shifter loss of 3.2 dB/mm for maximum optical transmission. The Ge photodetector, which allows simpler integration process based on reduced pressure chemical vapor deposition exhibited operation over 30 Gb/s with a low dark current of 700 nA at -1V. The fabricated silicon PIC(intra-chip) for on-chip (intra-chip) photonic interconnects, where the monolithically integrated modulator and Ge photodetector were connected by a silicon waveguide on the same chip, showed on-chip data transmissions up to 20 Gb/s, indicating potential application in future silicon on-chip optical network. We also report the performance of the hybrid silicon electronic-photonic IC (EPIC), where a PIC(intra-chip) chip and 0.13μm CMOS interface IC chips were hybrid-integrated.


Optics Express | 2010

High-sensitivity 10 Gbps Ge-on-Si photoreceiver operating at λ ~1.55 μm

Jiho Joo; Sang Hoon Kim; In Gyoo Kim; Ki-Seok Jang; Gyungock Kim

We present a high-sensitivity photoreceiver based on a vertical- illumination-type 100% Ge-on-Si photodetector. The fabricated p-i-n photodetector with a 90 microm-diameter mesa shows the -3 dB bandwidth of 7.7 GHz, and the responsivity of 0.9 A/W at lambda approximately 1.55 microm, corresponding to the external quantum efficiency of 72%. A TO-can packaged Ge photoreceiver exhibits the sensitivity of -18.5 dBm for a BER of 10(-12) at data rate of 10 Gbps. This result proves the capability of a cost-effective 100% Ge-on-Si photoreceiver which can readily replace the III-V counterparts for optical communications.


Optics Letters | 2014

Compact-sized high-modulation-efficiency silicon Mach-Zehnder modulator based on a vertically dipped depletion junction phase shifter for chip-level integration.

Gyungock Kim; Jeong Woo Park; In Gyoo Kim; Sang Hoon Kim; Ki-Seok Jang; Sun Ae Kim; Jin Hyuk Oh; Jiho Joo; Sang-Gi Kim

We present small-sized depletion-type silicon Mach-Zehnder (MZ) modulator with a vertically dipped PN depletion junction (VDJ) phase shifter based on a CMOS compatible process. The fabricated device with a 100 μm long VDJ phase shifter shows a VπLπ of ∼0.6  V·cm with a 3 dB bandwidth of ∼50  GHz at -2  V bias. The measured extinction ratios are 6 and 5.3 dB for 40 and 50  Gb/s operation under 2.5  Vpp differential drive, respectively. On-chip insertion loss is 3 dB for the maximum optical transmission. This includes the phase-shifter loss of 1.88  dB/100  μm, resulting mostly from the extra optical propagation loss through the polysilicon-plug structure for electrical contact, which can be readily minimized by utilizing finer-scaled lithography nodes. The experimental result indicates that a compact depletion-type MZ modulator based on the VDJ scheme can be a potential candidate for future chip-level integration.


Optics Express | 2013

High-performance photoreceivers based on vertical-illumination type Ge-on-Si photodetectors operating up to 43 Gb/s at λ~1550nm.

In Gyoo Kim; Ki-Seok Jang; Jiho Joo; Sang Hoon Kim; Sang-Gi Kim; Kwang-Seong Choi; Jin Hyuk Oh; Sun Ae Kim; Gyungock Kim

We present high-sensitivity photoreceivers based on a vertical- illumination-type 100% Ge-on-Si p-i-n photodetectors (PDs), which operate up to 50 Gb/s with high responsivity. A butterfly-packaged photoreceiver using a Ge PD with 3-dB bandwidth (f(-3dB)) of 29 GHz demonstrates the sensitivities of -10.15 dBm for 40 Gb/s data rate and -9.47 dBm for 43 Gb/s data rate, at BER of 10(-12) and λ ~1550 nm. Also a photoreceiver based on a Ge PD with f(-3dB)~19 GHz shows -14.14 dBm sensitivity at 25 Gb/s operation. These results prove the high performance levels of vertical-illumination type Ge PDs ready for practical high-speed network applications.


Scientific Reports | 2015

Single-chip photonic transceiver based on bulk-silicon, as a chip-level photonic I/O platform for optical interconnects

Gyungock Kim; Hyundai Park; Jiho Joo; Ki-Seok Jang; Myung-Joon Kwack; Sang-Hoon Kim; In Gyoo Kim; Jin Hyuk Oh; Sun Ae Kim; Jaegyu Park; Sang-Gi Kim

When silicon photonic integrated circuits (PICs), defined for transmitting and receiving optical data, are successfully monolithic-integrated into major silicon electronic chips as chip-level optical I/Os (inputs/outputs), it will bring innovative changes in data computing and communications. Here, we propose new photonic integration scheme, a single-chip optical transceiver based on a monolithic-integrated vertical photonic I/O device set including light source on bulk-silicon. This scheme can solve the major issues which impede practical implementation of silicon-based chip-level optical interconnects. We demonstrated a prototype of a single-chip photonic transceiver with monolithic-integrated vertical-illumination type Ge-on-Si photodetectors and VCSELs-on-Si on the same bulk-silicon substrate operating up to 50 Gb/s and 20 Gb/s, respectively. The prototype realized 20 Gb/s low-power chip-level optical interconnects for λ ~ 850 nm between fabricated chips. This approach can have a significant impact on practical electronic-photonic integration in high performance computers (HPC), cpu-memory interface, hybrid memory cube, and LAN, SAN, data center and network applications.


Optics Express | 2015

Silicon photonic receiver and transmitter operating up to 36 Gb/s for λ~1550 nm

Jiho Joo; Ki-Seok Jang; Sang Hoon Kim; In Gyoo Kim; Jin Hyuk Oh; Sun Ae Kim; Gyu-Seob Jeong; Yoonsoo Kim; Jun-Eun Park; Sungwoo Kim; Hankyu Chi; Deog-Kyoon Jeong; Gyungock Kim

We present the hybrid-integrated silicon photonic receiver and transmitter based on silicon photonic devices and 65 nm bulk CMOS interface circuits operating over 30 Gb/s with a 10(-12) bit error rate (BER) for λ ~1550nm. The silicon photonic receiver, operating up to 36 Gb/s, is based on a vertical-illumination type Ge-on-Si photodetector (Ge PD) hybrid-integrated with a CMOS receiver front-end circuit (CMOS Rx IC), and exhibits high sensitivities of -11 dBm, -8 dBm, and -2 dBm for data rates of 25 Gb/s, 30 Gb/s and 36 Gb/s, respectively, at a BER of 10(-12). The measured energy efficiency of the Si-photonic receiver is 2.6 pJ/bit at 25 Gb/s with an optical input power of -11 dBm, and 2.1 pJ/bit at 36 Gb/s with an optical power of -2 dBm. The hybrid-integrated silicon photonic transmitter, comprised of a depletion-type Mach-Zehnder modulator (MZM) and a CMOS driver circuit (CMOS Tx IC), shows better than 5.7 dB extinction ratio (ER) for 25 Gb/s, and 3 dB ER for 36 Gb/s. The silicon photonic transmitter achieves the data transmission with less than 10(-15) BER at 25 Gb/s, 10(-14) BER at 28 Gb/s, and 6 x 10(-13) BER with the energy efficiency of ~6 pJ/bit at 30 Gb/s.


Proceedings of SPIE | 2016

High performance Ge-on-Si avalanche photodetector

Ki-Seok Jang; Sang Hoon Kim; In Gyoo Kim; Jin Hyuk Oh; Sun Ae Kim; Jiho Joo; Gyungock Kim

We present high performance vertical-illumination type Ge-on-Si avalanche photodetectors and photoreceiver modules operating up to 25 Gb/s. The Ge avalanche photodetectors were grown on a bulk-silicon wafer by RPCVD, and fabricated with CMOS-compatible process. The fabricated devices show a -3dB bandwidth greater than 13 GHz at operational biases (gain> 20) for λ ~ 1550 nm. The measured maximum gain-bandwidth (GB) product is ~ 493 GHz. Two types of Ge-on-Si APD receiver modules exhibit high sensitivities of better than –20.7 dBm for a 25 Gb/s operation at a BER = 10-12 and λ ~ 1310 nm, and –27.75 dBm for a 10 Gb/s operation at a BER = 10-12 and λ ~ 1550nm, respectively.


Proceedings of SPIE | 2016

Device characterization of the VCSEL-on-silicon as an on chip light source

Myung-Joon Kwack; Ki-Seok Jang; Jiho Joo; Hyundai Park; Jin Hyuk Oh; Jaegyu Park; Sang-Gi Kim; Gyungock Kim

Advancement of silicon photonics technology can offer a new dimension in data communications with un-precedent bandwidth. Increasing the integration level in the silicon photonics is required to develop compact high-performance chip-level optical interconnects for future systems. Especially, monolithic integration of light source on a silicon wafer is important for future silicon photonic integrated circuits, since realizing a compact on-chip light source on a silicon wafer is a serious issue which impedes practical implementation of the silicon photonic interconnects. At present, due to the lack of a practical light source based on Group IV elements, flip chip-bonded or packaged lasers based on III–V semiconductor are usually being used as external light sources, to feed silicon modulators on SOI wafers to complete a photonic transmitter, except the reported silicon hybrid lasers monolithic-integrated on SOI wafers. To overcome above problem, we have proposed a compact on-chip light source, the directly monolithic-integrated VCSEL on a bulk silicon wafer (VCSEL-on-Si), based on the transplanted epitaxial film by substrate lift-off process and following device-fabrication on the bulk Si wafer. This can offer practical low-power-consumption light sources integrated on a silicon wafer, which can provide a complete chip-level I/O set when combined with monolithic-integrated vertical-illumination Ge-on-Si photodetectors on the same silicon wafer. In this work, we report the characterization of direct-modulation VCSELs-on-Si for λ ~850 nm with CW optical output power > ~2 mW and the threshold current < ~3 mA, over 10 Gb/s operations. We also discuss about the thermal characteristics of the VCSELs-on-Si.


Proceedings of SPIE | 2015

Silicon photonic devices based on SOI/bulk-silicon platforms for chip-level optical interconnects

Gyungock Kim; In Gyoo Kim; Sang Hoon Kim; Jiho Joo; Ki-Seok Jang; Sun Ae Kim; Jin Hyuk Oh; Jeong Woo Park; Myung-Joon Kwack; Jaegyu Park; Hyundai Park; Gun Sik Park; Sang-Gi Kim

Based on either a SOI wafer or a bulk-silicon wafer, we discuss silicon photonic devices and integrations for chip-level optical interconnects. We present the low-voltage silicon PICs on a SOI wafer, where Si modulators and Ge-on-Si photodetectors are monolithically-integrated for intra-chip or inter-chip interconnects over 40 Gb/s. For future chip-level integration, the 50 Gb/s small-sized depletion-type MZ modulator with the vertically-dipped PN-depletion-junction (VDJ) is also presented. We report vertical-illumination-type Ge photodetectors on bulk-silicon wafers, with high performances up to 50 Gb/s. We present the bulk-silicon platform for practical implementation of chip-level interconnects, and the performance of the photonic transceiver silicon chip.


opto-electronics and communications conference | 2012

High-performance Ge photoreceivers operating in the wavelength range of 850 nm∼1550 nm

Ki-Seok Jang; Sang Hoon Kim; In Gyoo Kim; Jiho Joo; Gyungock Kim

We present high-performance photoreceivers based on vertical-illumination-type 100% Ge-on-Si p-i-n photo-detectors (PDs) operating at λ ~1550 nm and at λ ~850 nm. The TO-can packaged photoreceivers with Ge PDs optimized for λ ~1550 nm and data rates of 2.5 Gbps and 10 Gbps exhibit the sensitivities of -25.5 dBm and -9.5 dBm (bit error rate of 10-12), respectively. Also, the 10 Gbps photoreceiver with a Ge PD optimized for λ ~850 nm shows the sensitivity of -15.64 dBm. This experimental result indicates that the Ge photoreceiver based on silicon photonics technology can readily provide cost-effective solutions for optical network applications.

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Gyungock Kim

Electronics and Telecommunications Research Institute

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Jiho Joo

Electronics and Telecommunications Research Institute

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In Gyoo Kim

Electronics and Telecommunications Research Institute

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Sang Hoon Kim

Electronics and Telecommunications Research Institute

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Jin Hyuk Oh

Electronics and Telecommunications Research Institute

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Sun Ae Kim

Electronics and Telecommunications Research Institute

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Sang-Gi Kim

Electronics and Telecommunications Research Institute

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Hankyu Chi

Seoul National University

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Hyundai Park

Electronics and Telecommunications Research Institute

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