Ippei Kobayashi

10 nm-deep n+/p and p+/n Ge junctions with high activation formed by ion implantation and Flash Lamp Annealing (FLA)

In this paper, we report on the formation of shallow junctions with high activation in both n+/p and p+/n Ge junctions using ion implantation and Flash Lamp Annealing (FLA). The shallowest junction depths formed for the n+/p and p+/n junctions were 9.5 nm and 10.7 nm with sheet resistances of 620 ohms/sq. and 414 ohms/sq., respectively. Additionally, by reducing knocked-on oxygen during ion implantation, the sheet resistance was decreased by 5 to 15%. The lowest sheet resistance was 235 ohms/sq. with a junction depth of 21.5 nm in the n+/p Ge. These results indicate that the potential for forming ultra-shallow n+/p and p+/n junctions in the nanometer range in Ge devices using FLA is very high, leading to realistic monolithically-integrated Ge CMOS devices.

Formation of n+/p junctions less than 20 nm deep in Ge and diffusion control by Flash Lamp Annealing (FLA)

We demonstrate the formation of n+/p ultra-shallow junctions in Ge using Flash Lamp Annealing (FLA). With FLA both shallow junctions and high activation can be achieved, for example, a sheet resistance of 400 ohms/sq with a junction depth of 20 nm. The shallowest junction depth was 17 nm with a sheet resistance of 493 ohms/sq. In addition, by varying the FLA conditions, i.e., the temperature and annealing time in the millisecond range, diffusion lengths of less than 30 nm can be controlled with a precision of 1nm. These results indicate that FLA has great potential for forming ultra-shallow n+/p junctions in Ge devices.

Conformal SDE doping for FinFETs using an arsenic-doped Sol-Gel Coating (SGC) and Flash Lamp Annealing (FLA)

We demonstrated the formation of ultra-shallow n+/p junctions in Si using an arsenic-doped Sol-Gel Coating (SGC) (Tokyo Ohka Kogyo Co., Ltd.) [1] and Flash Lamp Annealing (FLA). A high arsenic dopant concentration of 1.2×1020atoms/cm3 (Xj=9.0nm, Rs= 1203ohms/sq.) with a good junction profile (2.2nm/decade) was realized with 1.4ms FLA. These results indicate that this technique can be used for conformal doping of the Source/Drain Extensions (SDE) in sub-10nm FinFETs fabricated using advanced 3D device engineering.

A novel approach for highly activated p + diffusion layer formation in germanium by pre-heating oxygen desorption before ion implantation

Silicon semiconductor devices have remarkably been improved by the process scaling and introduction of some boosting technologies such as high-k/metal gate and strained silicon. However further improvement is quite difficult from the view point of mobility of silicon material. To overcome this problem, an increasing amount of attention has been devoted to the investigation of some higher carrier mobility materials such as SiGe, Ge or III-V materials. Among those materials, due to higher carrier mobility of Ge, it is promising as one of the candidates for high-performance devices with low-power and high-speed operation [1]. However several challenges still remain for the fabrication of Ge MOSFETs. For junction formation, it is difficult to form shallow N+/P junction in Ge due to the anomalous high diffusion coefficient of donor ions. On the other hand, forming shallow P+/N junction is relatively easy, however the high activation is difficult. To address these problems, some processes have been proposed such as aluminum doping [2], group-III metal doping [3] and optimization of Flash Lamp Annealing (FLA) [4]. In this study, we focused on the effect of oxygen remaining in the surface region of Ge substrate. Generally, a large amount of solid-solved oxygen is contained in Ge substrate. It is known that the oxygen inside Ge crystal acts as a Thermal Double Donor (TDD) [5]. TDD will inhibit the activation of acceptor ions in Ge and result in increase in the sheet resistance (Rs) of p+ diffusion layer formed into the surface region of the Ge substrate. In order to improve the activation, the Ge substrate is pre-heated at high temperature in the vacuum chamber before ion implantation to control the oxygen concentration in the surface region. Oxygen atoms in the Ge substrate can easily out-diffuse at the initial stage of ion implantation. Furthermore implantation is carried out at relatively low temperature to avoid TED of boron. In this paper, we report the results of BF2 implantation into Ge substrate with pre-heating process.

Nanometer-deep junctions with high doping concentration for Ge SDEs using solid source doping and flash lamp annealing

In recent years Solid Source Doping (SSD) has been considered as a viable option in fabricating advanced CMOS devices [1], especially for forming shallow and highly doped junctions for source drain extensions (SDE) while minimizing the damage to the devices [2]. Current scaled devices require diffusion control in the nanometer range in order to form shallow SDEs using SSD. Additionally, high doping concentrations are needed to lower the resistivity (see Fig. 1).