Ivan Radojevic
University of Auckland
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Featured researches published by Ivan Radojevic.
international conference on formal methods and models for co design | 2006
Flavius Gruian; Partha S. Roop; Zoran Salcic; Ivan Radojevic
In this paper, we propose a new system-level design language, called SystemJ. It extends Java with synchronous reactive features present in Esterel and asynchronous constructs suitable for modelling globally asynchronous locally synchronous systems. The strength of SystemJ comes from its ability to offer the data processing and encapsulation elegance of Java, Esterel-like reactivity and synchrony, and the asynchronous de-coupling of CSP all within the Java framework. Using standard Java environments, for specification and modelling, or specialised reactive embedded processors, for high performance implementation, the SystemJ design flow is extremely versatile. With the increasing attention that Java gets in embedded systems, SystemJ comes to address data and control, software and hardware, modelling and implementation in a unified manner
IEEE Design & Test of Computers | 2006
Ivan Radojevic; Zoran Salcic; Partha S. Roop
This article addresses the need for directly expressing heterogeneous, hierarchical behaviors for modeling specific embedded systems. After analyzing two existing ESL languages, SystemC and Esterel, the authors create a new model of computation and a graphical language to gain the direct expressivity they need for their model. Although researchers have suggested various changes to SystemC and Esterel to fit modeling requirements, this article considers mainly standard SystemC and Esterel
IEEE Transactions on Parallel and Distributed Systems | 2011
Ivan Radojevic; Zoran Salcic; Parthasarathi Roop
The use of formal models of computation in dealing with increasing complexity of embedded systems design is gaining attention. A successful model of computation must be able to handle both control-dominated and data-dominated behaviors, which are most often simultaneously present in complex embedded systems. Besides behavioral heterogeneity, direct support for modeling distributed systems is also desirable, since an increasing number of embedded systems belong to this category. In this paper, we present distributed DFCharts (DDFCharts), a language based on a formal model that targets distributed heterogeneous embedded systems. Its top hierarchical level is made suitable to capture distributed systems. Behavioral heterogeneity is addressed by composing finite-state machines (FSMs) and synchronous dataflow graphs (SDFGs). We illustrate modeling in DDFCharts with practical examples and describe its implementation on heterogeneous target architecture.
international conference on vlsi design | 2006
Ivan Radojevic; Zoran Salcic; Partha S. Roop
Dataflow process networks have been successfully used for modeling signal processing systems which are data-dominated. In this family of models, the most popular one is synchronous dataflow (SDF). On the other hand, hierarchical concurrent finite state machines (HCFSM) have been successfully employed for control-dominated systems. Most complex embedded systems are heterogeneous, consisting of both control-dominated and data-dominated parts. In this paper, we introduce a new model of computation, called DFCharts, which targets heterogeneous embedded systems. It combines the HCFSM (with Argos semantics) and SDF models. It has a formal, operational semantics based on Boolean automata with variables.
international conference on formal methods and models for co-design | 2007
Ivan Radojevic; Zoran Salcic; Partha S. Roop
Single-clock specifications with purely synchronous communication have been successfully used in capturing the behavior of small and medium scale embedded systems. In large scale embedded systems, where processes often operate at vastly different speeds, using a single clock in an entire specification can be difficult. In this paper, we present Multiclock Charts (McCharts), a language where finite state machines driven by different clocks are composed. The communication between FSMs is specified by both synchronous and asynchronous mechanisms. The essential feature in the semantics of McCharts is that a complete specification can be mapped onto a single multiclock FSM (MCFSM).
Archive | 2011
Ivan Radojevic; Zoran Salcic
This chapter looks at several important models of computation and languages for embedded systems design. We do not attempt to draw sharp distinctions between models and languages. Thus, the topics in this section are not divided strictly to either models of computation or languages. A model of computation is commonly used for defining the semantics of a language. However, when a model of computation is expressed with a simple syntax, it can also be called a language. For example, synchronous dataflow (SDF) is usually thought of as a model of computation. But as soon as it is expressed with a simple graphical syntax consisting of a network of blocks connected with arrows, it is not incorrect to call it a language.
International Journal of Software Engineering and Knowledge Engineering | 2005
Ivan Radojevic; Zoran Salcic; Partha S. Roop
Specification of embedded systems based on formal models of computation is gaining importance. The behavior of an increasing number of embedded systems is heterogeneous, consisting of a mixture of control-dominated and data-dominated parts. While models of computations suitable to control-dominated systems and data-dominated systems are well developed, there are only a limited number of models catering to both systems. In this paper, we present informally a new model for heterogeneous embedded systems, called HEMOC, which combines three common models of computation, synchronous reactive, hierarchical finite state machines and synchronous data flow. Then, the languages Esterel and SyncCharts are used for system specification following the new model in order to determine what they need to become suitable specification platform.
Archive | 2011
Ivan Radojevic; Zoran Salcic
With graphical syntax presented in Chap. 1 and Java-based textual syntax given in Chap. 6, DFCharts can be used as a language for specification of embedded systems. In this chapter we use DFCharts as a model of computation to assess the effectiveness of two popular system level languages, SystemC and Esterel, in capturing behaviour of heterogeneous embedded systems. While SystemC is being proposed by an industry consortium and has no formal semantics, Esterel has a formal semantics and formal verification capabilities. Hence, both these languages represent differing perspectives on system-level modelling. The frequency relay case study was specified in both languages, following the DFCharts model as closely as possible. Using this analysis, we can identify what needs to be improved in each language in order to increase their ability to handle heterogeneous embedded systems. The relation between the two languages and DFCharts was previously described in [105].
Archive | 2011
Ivan Radojevic; Zoran Salcic
This chapter presents a Java environment for DFCharts based design. The specification of finite state machines, synchronous dataflow graphs and communication mechanisms used in DFCharts is supported by a Java class library. Besides the DFCharts library, Ptolemy is needed for simulation of SDF graphs.
Archive | 2011
Ivan Radojevic; Zoran Salcic
This chapter describes how embedded systems are specified in DFCharts. Section 3.1 presents an introduction to specification in DFCharts. Section 3.2 illustrates the application of DFCharts on a practical heterogeneous embedded system called frequency relay. Section 3.3 discusses languages and models related to DFCharts. Section 3.4 presents an extension of DFCharts called DDFCharts, which gives another dimension to DFCharts of being suitable to formally model class of distributed embedded systems.