J.A. Valls

Architecture and performance of the DELPHI trigger system

Abstract This paper describes the trigger system of the DELPHI detector at LEP. It reports on the most relevant aspects of the hardware and shows the software strategies that have been developed to optimize its use. In 1993 the structure of the trigger in four decision levels has become fully operational and data collected during this period have been used to study the trigger performance. Various final state channels such as μ + μ − , e + e − and hadronic events were selected and their trigger efficiencies were calculated as a function of the polar angle θ. The results obtained indicate that, for any of the event topologies considered, the DELPHI trigger efficiency is independent of the θ angle, and, furthermore, the attained efficiency values are determined to be very close to 100% within an extremely good precision. This is a consequence of the high redundancy presently provided by all the DELPHI subdetectors. In addition to this analysis, events containing isolated particles either in the barrel or in the forward regions have been selected to evaluate the trigger response to single particles. Hence, trigger efficiencies for single particles have also been computed for charged tracks as a function of the momentum and for photons as a function of the deposited electromagnetic energy.

Digital signal reconstruction in the ATLAS hadronic tile calorimeter

We present an optimal filtering (OF) algorithm to reconstruct the energy, time and pedestal of a photomultiplier signal from its digital samples. The OF algorithm was first developed for liquid ionization calorimeters, its implementation in scintillator calorimeters, specifically in the ATLAS hadronic tile calorimeter (TileCal), is the aim of this paper. The objective is to implement the algorithm on the DSPs of the read out driver cards in order to reconstruct online the energy of the calorimeter and provide it to the second level trigger. The algorithm is tested and compared with a plain filtering algorithm using both calibration and real data from the TileCal detector. The results are promising specially in the regions where the electronic noise contributes significantly to the resolution

Development of the Optical Multiplexer Board Prototype for Data Acquisition in the TileCal System

This paper describes the development of the optical multiplexer board (OMB), also known as PreROD board, for the TileCal readout system in the ATLAS experiment. The aim of this board is to overcome the problems that may arise in the integrity of data due to radiation effects. The solution adopted has been to add redundancy to data transmission and so two optical fibers with the same data come out from the detector front end boards. The OMB has to decide in real time which fiber, eventually, carries data with no errors switching it to the output link connected to the read out driver (ROD) motherboard where data processing takes place. Besides, the board may be also used as a data injector for testing purposes of the ROD motherboard. The paper describes the design and tests of the first prototype, implemented as a 6U VME64x slave module, including both hardware aspects, focusing on signal integrity problems, and firmware aspects, dealing with the cyclic redundancy code algorithms used to check data consistency used to make the decision

ATLAS TileCal read out driver production

The production tests of the 38 ATLAS TileCal Read Out Drivers (RODs) are presented in this paper. The hardware specifications and firmware functionality of the RODs modules, the test-bench and the test procedure to qualify the boards are described. Finally the performance results, the temperature studies and high rate tests are shown and discussed.

Digital Signal Reconstruction in the ATLAS Hadronic Tile Calorimeter

We present an Optimal Filtering (OF) algorithm to reconstruct the energy, time and pedestal of a photomultiplier signal from its digital samples. The OF algorithm was first developed for liquid ionization calorimeters, its implementation in scintillator calorimeters, specifically in the ATLAS hadronic Tile calorimeter (TileCal), is the aim of this study. The objective is to implement the algorithm on the DSPs of the Read Out Driver cards in order to reconstruct online the energy of the calorimeter and provide it to the second level trigger. The algorithm is tested and compared with a plain filtering algorithm using both calibration and real data from the TileCal detector. The results are promising specially in the regions where the electronic noise contributes significantly to the resolution

Algorithms for the ROD DSP of the ATLAS hadronic Tile Calorimeter

In this paper we present the performance of two algorithms currently running in the Tile Calorimeter Read-Out Driver boards for the commissioning of ATLAS. The first algorithm presented is the so called Optimal Filtering. It reconstructs the deposited energy in the Tile Calorimeter and the arrival time of the data. The second algorithm is the MTag which tags low transverse momentum muons that may escape the ATLAS muon spectrometer first level trigger. Comparisons between online (inside the Read-Out Drivers) and offline implementations are done with an agreement around 99% for the reconstruction of the amplitude using the Optimal Filtering algorithm and a coincidende of 93% between the offline and online tagged muons for the MTag algorithm. The processing time is measured for both algorithms running together with a resulting time of 59.2 μs which, although above the 10 μs of the first level trigger, it fulfills the requirements of the commissioning trigger ( ~ 1 Hz). We expect further optimizations of the algorithms which will reduce their processing time below 10 μs.

Optical Link Card Design for the Phase II Upgrade of TileCal Experiment

This paper presents the design of an optical link card developed in the frame of the R&D activities for the phase 2 upgrade of the TileCal experiment. This board, that is part of the evaluation of different technologies for the final choice in the next years, is designed as a mezzanine that can work independently or be plugged in the optical multiplexer board of the TileCal backend electronics. It includes two SNAP 12 optical connectors able to transmit and receive up to 75 Gb/s and one SFP optical connector for lower speeds and compatibility with existing hardware as the read out driver. All processing is done in a Stratix II GX field-programmable gate array (FPGA). Details are given on the hardware design, including signal and power integrity analysis, needed when working with these high data rates and on firmware development to obtain the best performance of the FPGA signal transceivers and for the use of the GBT protocol.

ATLAS TileCal Read-Out Driver System Production and Initial Performance Results

The ATLAS hadronic Tile Calorimeter detector (TileCal) is an iron-scintillating tiles sampling calorimeter designed to operate at the Large Hadron Collider accelerator at CERN. The central element of the back-end system of the TileCal detector is a 9U VME read-out driver (ROD) board. The operation of the TileCal calorimeter requires a total of 32 ROD boards. This paper summarizes the tests performed during the ROD production and the results obtained. Data processing is performed in the ROD by digital signal processors, whose operation is based on the use of online algorithms such as the optimal filtering algorithm for the signal amplitude, pedestal and time reconstruction and the online Muon tagging algorithm which identifies low transverse momentum muons. The initial performance of both algorithms run during commissioning is also presented in this paper.

Functional super Read-Out Driver demonstrator for the Phase II Upgrade of the ATLAS Tile Calorimeter

This work presents the implementation of a functional super Read-Out Driver (sROD) demonstrator for the Phase II Upgrade of the ATLAS Tile Calorimeter (TileCal) in the LHC experiment. The proposed front-end for the Phase II Upgrade communicates with back-end electronics using a multifiber optical connector with a data rate of 57.6 Gbps using the GBT protocol. This functional sROD demonstrator aims to help in the understanding of the problems that could arise in the upgrade of back-end electronics. The demonstrator is composed of three different boards that have been developed in the framework of ATLAS activities: the Optical Multiplexer Board (OMB), the Read-Out Driver (ROD) and the Optical Link Card (OLC). This functional sROD demonstrator will be used to develop a prototype, in ATCA format, of the new ROD for the Phase II.

Production and commissioning performance tests of the read-out driver boards for the hadronic tile calorimeter of the ATLAS detector at the LHC

The ATLAS hadronic tile calorimeter detector (TileCal) is an iron-scintillating tiles sampling calorimeter designed to operate at the Large Hadron Collider (LHC) accelerator at CERN. The central element of the back-end system of the TileCal detector is a 9U VME read-out driver (ROD) board. The operation of the TileCal calorimeter requires a total of 32 ROD boards. We report here on the overall electrical performance of the ROD boards during their production phase and during their first operation at the ATLAS commissioning setup at CERN. We report also on the real time operation and performance of the ROD digital signal processors (DSPs) on the first cosmic data runs taken at the commissioning setup. The DSP operation is based on the use of optimal filtering algorithms for the signal amplitude, pedestal and time online reconstruction and which, in addition, monitor the quality of the reconstructions