J. Anthony Powell

Production of large-area single-crystal wafers of cubic SiC for semiconductor devices

A reproducible process is described for growing a thick single‐crystal layer of cubic SiC on a single‐crystal Si wafer by chemical vapor deposition. A buffer layer, grown in situ, is used between the cubic SiC and the Si substrate to minimize the effect of lattice mismatch. Layers of up to 34 μm thick and several cm2 in area have been grown. Wafers are obtained by chemically removing the Si substrates from the grown layers. Excellent electron channeling patterns produced by these wafers indicate very good crystal quality. Preliminary electrical measurements have yielded electron mobilities up to 380 cm2/Vs.

Site‐competition epitaxy for superior silicon carbide electronics

We present and discuss a novel dopant control technique for compound semiconductors, called site‐competition epitaxy, which enables a much wider range of reproducible doping control and affords much higher and lower epilayer doping concentrations than was previously possible. Site‐competition epitaxy is presented for the chemical vapor deposition of 6H‐SiC epilayers on commercially available (0001)SiC silicon‐face substrates. Results from utilizing site‐competition epitaxy include the production of degenerately doped SiC epilayers for ohmic‐as‐deposited (i.e., unannealed) metal contacts as well as very low doped epilayers for electronic devices exhibiting SiC record‐breaking reverse voltages of 300 and 2000 V for 3C‐ and 6H‐SiC p‐n junction diodes, respectively.

Growth and Characterization of Cubic SiC Single‐Crystal Films on Si

Morphological and electrical characterization results are presented for cubic SiC films grown by chemical vapor deposition on single-crystal Si substrates. The films, up to 40 microns thick, were characterized by optical microscopy, (SEM), (TEM), electron channeling, surface profilometry, and Hall measurements. A variety of morphological features observed on the SiC films are described. Electrical measurements showed a decrease in the electron mobility with increasing electron carrier concentration, similar to that observed in Si. Room-temperature electron mobilities up to 520 sq cm/V-s (at an electron carrier concentration of 5 x 10 to the 16th/cu cm) were measured. Finally, a number of parameters believed to be important in the growth process were investigated, and some discussion is given of their possible effects on the film characteristics.

Growth of step-free surfaces on device-size (0001)SiC mesas

It is believed that atomic-scale surface steps cause defects in single-crystal films grown heteroepitaxially on SiC substrates. A method is described whereby surface steps can be grown out of existence on arrays of device-size mesas on commercial “on-axis” SiC wafers. Step-free mesas with dimensions up to 200 μm square have been produced on 4H-SiC wafers and up to 50 μm square on a 6H-SiC wafer. A limiting factor in scaling up the size and yield of the step-free mesas is the density of screw dislocations in the SiC wafers. The fundamental significance of this work is that it demonstrates that two-dimensional nucleation of SiC can be suppressed while carrying out step-flow growth on (0001)SiC. The application of this method should enable the realization of improved heteroepitaxially-grown SiC and GaN device structures.It is believed that atomic-scale surface steps cause defects in single-crystal films grown heteroepitaxially on SiC substrates. A method is described whereby surface steps can be grown out of existence on arrays of device-size mesas on commercial “on-axis” SiC wafers. Step-free mesas with dimensions up to 200 μm square have been produced on 4H-SiC wafers and up to 50 μm square on a 6H-SiC wafer. A limiting factor in scaling up the size and yield of the step-free mesas is the density of screw dislocations in the SiC wafers. The fundamental significance of this work is that it demonstrates that two-dimensional nucleation of SiC can be suppressed while carrying out step-flow growth on (0001)SiC. The application of this method should enable the realization of improved heteroepitaxially-grown SiC and GaN device structures.

2000 V 6H‐SiC p‐n junction diodes grown by chemical vapor deposition

In this letter we report on the fabrication and initial electrical characterization of the first silicon carbide diodes to demonstrate rectification to reverse voltages in excess of 2000 V at room temperature. The mesa structured 6H‐SiC p+n junction diodes were fabricated in 6H‐SiC epilayers grown by atmospheric pressure chemical vapor deposition on commercially available 6H‐SiC wafers. The devices were characterized while immersed in FluorinertTM to prevent arcing which occurs when air breaks down under high electric fields. The simple nonoptimized diodes, whose device areas ranged from 7×10−6 to 4×10−4 cm2, exhibited a 2000 V functional device yield in excess of 50%.

Surface morphology of silicon carbide epitaxial films

Silicon carbide (SiC) semiconductor technology has been advancing rapidly, but there are numerous crystal growth problems that need to be solved before SiC can reach its full potential. Among these problems is a need for an improvement in the surface morphology of epitaxial films that are grown to produce device structures. Because of advantageous electrical properties, SiC development is shifting from the 6H to the 4H polytype. In this study of both 6H and 4H-SiC epilayers, atomic force microscopy and other techniques were used to characterize SiC epilayer surface morphology. Observed features included isolated growth pits a few micrometers in size in both polytypes and triangles (in 4H only) approximately 50 um in size for epilayers 3 um in thickness. Also observed in some epilayers were large steps with heights greater than 20 nm. We found that there are significant differences between the morphology of 6H and 4H epilayers grown under identical conditions. We were able to improve surface morphology by avoiding conditions that lead to excess silicon during the initial startup of the growth process. However, the observed morphological defect density in both 6H and 4H epilayers was still the order of 104 cm-2 and varied widely from run to run. As expected, we found that morphological defects in the SiC substrates play a role in the formation of some epilayer surface features.

Low-temperature solid-state phase transformations in 2H silicon carbide.

Single crystals of 2H SiC were observed to undergo phase transformations at temperatures as low as 400°C. Some 2H crystals transformed to a structure with one‐dimensional disorder along the crystal c axis. Others transformed to a faulted cubic/6H structure. The transformation is time and temperature dependent, and is greatly enhanced by dislocations. Our observations indicate that the transformation takes place by means of a slip process perpendicular to the c axis. Cubic SiC crystals were observed to undergo a solid‐state transformation above 1400°C.

Enlargement of Step-Free SiC Surfaces by Homoepitaxial Web-Growth of Thin SiC Cantilevers

Lateral homoepitaxial growth of thin cantilevers emanating from mesa patterns that were reactive ion etched into on-axis commercial SiC substrates prior to growth is reported. The thin cantilevers form after pure stepflow growth removes almost all atomic steps from the top surface of a mesa, after which additional adatoms collected by the large step-free surface migrate to the mesa sidewall where they rapidly incorporate into the crystal near the top of the mesa sidewall. The lateral propagation of the step-free cantilevered surface is significantly affected by pregrowth mesa shape and orientation, with the highest lateral expansion rates observed at the inside concave corners of V-shaped pregrowth mesas with arms lengthwise oriented along the 〈1100〉 direction. Complete spanning of the interiors of V’s and other mesa shapes with concave corners by webbed cantilevers was accomplished. Optical microscopy, synchrotron white beam x-ray topography and atomic force microscopy analysis of webbed regions formed ...

Crystal Growth of 2H Silicon Carbide

Crystal growth of 2H silicon carbide showing temperature profile along susceptor as affecting factor

Epitaxial growth of 6H SiC in the temperature range 1320–1390°C

High‐quality epitaxial layers of 6H SiC have been grown on 6H SiC substrates with the growth direction perpendicular to the crystal c axis. The growth was by chemical vapor deposition from methyltrichlorosilane (CH3SiCl3) in hydrogen. Epitaxial layers up to 80 μm thick were grown at rates of 0.4 μm/min. Attempts at growth on the (0001) plane of 6H SiC substrates under similar conditions resulted in polycrystalline cubic SiC layers. Optical and x‐ray diffraction techniques were used to characterize the grown layers.