Lawrence G. Matus

Site‐competition epitaxy for superior silicon carbide electronics

We present and discuss a novel dopant control technique for compound semiconductors, called site‐competition epitaxy, which enables a much wider range of reproducible doping control and affords much higher and lower epilayer doping concentrations than was previously possible. Site‐competition epitaxy is presented for the chemical vapor deposition of 6H‐SiC epilayers on commercially available (0001)SiC silicon‐face substrates. Results from utilizing site‐competition epitaxy include the production of degenerately doped SiC epilayers for ohmic‐as‐deposited (i.e., unannealed) metal contacts as well as very low doped epilayers for electronic devices exhibiting SiC record‐breaking reverse voltages of 300 and 2000 V for 3C‐ and 6H‐SiC p‐n junction diodes, respectively.

Growth and Characterization of Cubic SiC Single‐Crystal Films on Si

Morphological and electrical characterization results are presented for cubic SiC films grown by chemical vapor deposition on single-crystal Si substrates. The films, up to 40 microns thick, were characterized by optical microscopy, (SEM), (TEM), electron channeling, surface profilometry, and Hall measurements. A variety of morphological features observed on the SiC films are described. Electrical measurements showed a decrease in the electron mobility with increasing electron carrier concentration, similar to that observed in Si. Room-temperature electron mobilities up to 520 sq cm/V-s (at an electron carrier concentration of 5 x 10 to the 16th/cu cm) were measured. Finally, a number of parameters believed to be important in the growth process were investigated, and some discussion is given of their possible effects on the film characteristics.

Growth of step-free surfaces on device-size (0001)SiC mesas

It is believed that atomic-scale surface steps cause defects in single-crystal films grown heteroepitaxially on SiC substrates. A method is described whereby surface steps can be grown out of existence on arrays of device-size mesas on commercial “on-axis” SiC wafers. Step-free mesas with dimensions up to 200 μm square have been produced on 4H-SiC wafers and up to 50 μm square on a 6H-SiC wafer. A limiting factor in scaling up the size and yield of the step-free mesas is the density of screw dislocations in the SiC wafers. The fundamental significance of this work is that it demonstrates that two-dimensional nucleation of SiC can be suppressed while carrying out step-flow growth on (0001)SiC. The application of this method should enable the realization of improved heteroepitaxially-grown SiC and GaN device structures.It is believed that atomic-scale surface steps cause defects in single-crystal films grown heteroepitaxially on SiC substrates. A method is described whereby surface steps can be grown out of existence on arrays of device-size mesas on commercial “on-axis” SiC wafers. Step-free mesas with dimensions up to 200 μm square have been produced on 4H-SiC wafers and up to 50 μm square on a 6H-SiC wafer. A limiting factor in scaling up the size and yield of the step-free mesas is the density of screw dislocations in the SiC wafers. The fundamental significance of this work is that it demonstrates that two-dimensional nucleation of SiC can be suppressed while carrying out step-flow growth on (0001)SiC. The application of this method should enable the realization of improved heteroepitaxially-grown SiC and GaN device structures.

Mechanical properties of 3C silicon carbide

The residual stress and Young’s modulus of 3C silicon carbide (SiC) epitaxial films deposited on silicon substrates were measured by load‐deflection measurements using suspended SiC diaphragms fabricated with silicon micromachining techniques. The film’s residual stress was tensile and averaged 274 MPa while the in‐plane Young’s modulus averaged 394 GPa. In addition, the bending moment due to the residual stress variation through the thickness of the film was determined by measuring the deflection of free‐standing 3C‐SiC cantilever beams. The bending moment was in the range of 2.6×10−8–4.2×10−8 N m.

2000 V 6H‐SiC p‐n junction diodes grown by chemical vapor deposition

In this letter we report on the fabrication and initial electrical characterization of the first silicon carbide diodes to demonstrate rectification to reverse voltages in excess of 2000 V at room temperature. The mesa structured 6H‐SiC p+n junction diodes were fabricated in 6H‐SiC epilayers grown by atmospheric pressure chemical vapor deposition on commercially available 6H‐SiC wafers. The devices were characterized while immersed in FluorinertTM to prevent arcing which occurs when air breaks down under high electric fields. The simple nonoptimized diodes, whose device areas ranged from 7×10−6 to 4×10−4 cm2, exhibited a 2000 V functional device yield in excess of 50%.

An overview of silicon carbide device technology

Recent progress in the development of silicon carbide (SiC) as a semiconductor is briefly reviewed. This material shows great promise towards providing electronic devices that can operate under the high‐temperature, high‐radiation, and/or high‐power conditions where current semiconductor technologies fail. High quality single crystal wafers have become available, and techniques for growing high quality epilayers have been refined to the point where experimental SiC devices and circuits can be developed. The prototype diodes and transistors that have been produced to date show encouraging characteristics, but by the same token they also exhibit some device‐related problems that are not unlike those faced in the early days of silicon technology development. Although these problems will not prevent the implementation of some useful circuits, the performance and operating regime of SiC electronics will be limited until these device‐related issues are solved.