J. Berenguer

Digital Predistortion of Envelope Tracking Amplifiers driven by slew-rate limited envelopes

This paper presents a new Digital Predistorter (DPD) to compensate for nonlinear distortion that arises in Envelope Tracking (ET) Power Amplifiers (PAs) driven by slew-rate limited versions of the real signals envelope. The slower version of the transmitted signals envelope is used to cope with the slew-rate and bandwidth limitations of Envelope Amplifiers (EAs). Unfortunately, the use of slower versions of the real signals envelope as the drain modulator generates a special kind of nonlinear memory effects. This paper shows experimental results that prove that is possible to compensate for these nonlinear memory effects that appear when exciting the supply of a RF linear PA with a slew-rate limited version of the envelope.

A method for real-time generation of slew-rate limited envelopes in envelope tracking transmitters

This paper shows a method for generating slew-rate limited envelopes in order to accomplish the slew-rate restrictions of the envelope driver in envelope tracking transmitters. The proposed algorithm can run in real-time and it is implemented in a digital front-end of a Software Radio system. Simulation results and conclusions are provided to validate the methodology. Moreover, experimental results of an FPGA implementation are also provided.

Improvement of the Pull-In Range and Acquisition Time of a Microwave P.L.L. System by Injection Locking the V.C.O.

The requirements of large pull-in range and short acquisition time in microwave and millimeter wave phase locked oscillators are of great importance since the free running VCO frequency may be sorne tens of MHz off the reference frequency. A substantial improvement can be obtained by injection-locking the V.C.O. to the reference signal; as a result, the V.C.O behaviour changes to a phase controlled fixed frequency oscillator, giving a reduction by one in the system order. Then, frequency acquisition is performed by the injection-locking process, and phase tracking is made by the P.L.l. system. We present experimental comparisons between a microwave P.l.l. system operating at 11 GHz, with an without injection-locking synchronization.

Analogue adaptive feedback lineariser

A solid-state power amplifier (SSP A) linearisation technique based on the analogue implementation of the LMS algorithm is here presented. This technique leads to a linearisation scheme next to an hyperstable adaptive system, thus being suitable for the compensation of SSPA parameter variations. The lineariser is experimented on a class-A power amplifier backed-off by 3 dB.

Compact and Simple X 3 (9 to 27 GHz) Pll Frequency Multiplier Using Harmonic Phase Detection

Frequency multiplication in the microwave and millimeter-wave range can be performed in compact form using harmonic phase detectors, in which the veo phase is directly compared to a multiple of the reference frequency internally generated in the same device. In this paper we present a x3 P.l.L. frequency multiplier following this technique that phase-locks a 27 GHz Gunn diode VCO to a 9 GHz reference, in a simple and compact arrangement. The Gunn diode frequency is controlled via the voltage applied to it. The phase detector used is a balanced mixer, implemented with a 90• microstrip hybrid ring and Schottky diodes, and designed at the 9 GHz referente frequency. This system can be employed through the microwave and millimeter-wave ranges to obtain low arder odd-index frequency multiplications.

FPGA implementation of an LMS-based real-time adaptive Predistorter for Power Amplifiers

This paper presents an adaptive Digital Predistorter (DPD) for Power Amplifier (PA) linearization whose implementation and real time adaptation have been fully performed in a Field Programmable Gate Array (FPGA) device responsible for the co-processing tasks. The predistortion function is carried out in a Basic Predistortion Cell (BPC) containing a Look-up Table (LUT). One of the main advantages of this DPD configuration is that adaptation is performed in a hot manner and therefore, it is not necessary to switch the DPD into a training mode in order to estimate the LUT contents. Results showing the linearization capabilities of this adaptive DPD are here provided.

Improvement of Up-Converters Linearity for Ka-Band Operation

The application of a digital predistorter to the linearisation of a Ka-band mixer is presented herein. The general objective in the TX design is to get the best trade-off between linearity and costs. This require the most of the simplicity and possibly to take advantage from already existing devices (such as DSPs in modern digital transmitters) without perturbing their other functionalities. After a presentation of the problem and its constraints, we present the digital predistorter, which has been tested and debugged by means of IEEE-488 bus (GPIB) controllable instrumentation (EMA, electronic measuring automation) in order to finally consider its implementation on a fast new- generation FPGA device. Results show an increment of the linear zone in the up-converter AM-AM curve, of about 15 dB.

Study on the robustness of a 22 MHz bandwidth feedforward amplifier at the 2.4 GHz ISM-band

Most wireless applications must accomplish stringent linearity normative specifications that prioritize parameters, such as adjacent channel power ratio (ACPR) or error vector magnitude (EVM), in front of power efficiency, the last being a quality parameter usually defined by the manufacturer. One possible solution capable of satisfying both requirements is the use of a linearizing structure for the power amplifier, the feedforward amplifier being one of the most suitable for wideband applications. The paper presents a study focused on the effects of disappointments on the delay paths and on the directional coupler factor in the feedforward structure. Therefore, a theoretical analysis on the tradeoff existing between the degradation on the ACPR and the improvement of the overall power added efficiency (PAE) is presented. The study has been carried out using a 22 MHz bandwidth /spl pi//4 DQPSK modulated signal.

Analysis of the Optimum Gain of a High-Pass L-Matching Network for Rectennas

Rectennas, which mainly consist of an antenna, matching network, and rectifier, are used to harvest radiofrequency energy in order to power tiny sensor nodes, e.g., the nodes of the Internet of Things. This paper demonstrates for the first time, the existence of an optimum voltage gain for high-pass L-matching networks used in rectennas by deriving an analytical expression. The optimum gain is that which leads to maximum power efficiency of the rectenna. Here, apart from the L-matching network, a Schottky single-diode rectifier was used for the rectenna, which was optimized at 868 MHz for a power range from −30 dBm to −10 dBm. As the theoretical expression depends on parameters not very well-known a priori, an accurate search of the optimum gain for each power level was performed via simulations. Experimental results show remarkable power efficiencies ranging from 16% at −30 dBm to 55% at −10 dBm, which are for almost all the tested power levels the highest published in the literature for similar designs.

Collaborative Network Space: Infrastructure and Learning Application

Collaborative learning is attracting increase attention as a methodology to simultaneously improve motivation and interactivity. In order to fully enhance its potentialities, appropriate technological platforms and academic experimentation are needed. In this paper, a master course level experiment is presented based on the learning infrastructure defined