J. D. Morris

The evaporative cooling system for the ATLAS inner detector

This paper describes the evaporative system used to cool the silicon detector structures of the inner detector sub-detectors of the ATLAS experiment at the CERN Large Hadron Collider. The motivation for an evaporative system, its design and construction are discussed. In detail the particular requirements of the ATLAS inner detector, technical choices and the qualification and manufacture of final components are addressed. Finally results of initial operational tests are reported. Although the entire system described, the paper focuses on the on-detector aspects. Details of the evaporative cooling plant will be discussed elsewhere.

First data with the ATLAS Level-1 Calorimeter Trigger

The ATLAS Level-1 Calorimeter Trigger is one of the main elements of the first stage of event selection for the ATLAS experiment at the LHC. The input stage consists of a mixed analogue/digital component taking trigger sums from the ATLAS calorimeters. The trigger logic is performed in a digital, pipelined system with several stages of processing, largely based on FPGAs, which perform programmable algorithms in parallel with a fixed latency to process about 300 Gbyte/s of input data. The real-time output consists of counts of different types of physics objects, and energy sums. The final system consists of over 300 custom-built VME modules, of several different types. The installation at ATLAS of these modules, and the necessary infrastructure, was completed at the end of 2007. The system has since undergone intensive testing, both in standalone mode, and in conjunction with the whole of the ATLAS detector in combined running. The final steps of commissioning, and experience with running the full-scale system are presented. Results of integration tests performed with the upstream calorimeters, and downstream trigger and data-flow systems, are shown, along with an analysis of the performance of the calorimeter trigger in full ATLAS data-taking. This includes trigger operation during the cosmic muon runs from before LHC start-up, and a first look at LHC proton beam data.

Analysis of the initial performance of the ATLAS level-1 calorimeter trigger

The ATLAS first-level calorimeter trigger is a hardware-based system designed to identify high-pT jets, electron/photon and tau candidates and to measure total and missing ET in the calorimeters. The installation of the full system of custom modules, crates and cables was completed in late 2007, but, even before the completion, it was being used as a trigger during ATLAS commissioning and integration. During 2008, the performance of the full system has been tuned during further commissioning and cosmic runs, leading to its use in initial LHC data taking. Results and analysis of the trigger performance in these runs will be presented.

Testing and calibrating analogue inputs to the ATLAS Level-1 Calorimeter Trigger

The ATLAS Level-1 Calorimeter Trigger is a hardwarebased system which aims to identify objects with high transverse momentum within an overall latency of 2.5μs. It is composed of a PreProcessor system (PPr) which digitises 7200 analogue input channels, determines the bunch crossing of the interaction, applies a digital noise filter, and provides a fine calibration; and two subsequent digital processors. The PreProcessor system needs various channel dependent parameters to be set in order to provide digital signals which are aligned in time and have proper energy calibration. The different techniques which are used to derive these parameters are described along with the quality tests of the analogue input signals.

Control, test and monitoring software framework for the ATLAS level-1 calorimeter trigger

The ATLAS first-level calorimeter trigger is a hardware-based system designed to identify high-pT jets, electron/photon and tau candidates and to measure total and missing ET in the ATLAS calorimeters. The complete trigger system consists of over 300 custom designed VME modules of varying complexity. These modules are based around FPGAs or ASICs with many configurable parameters, both to initialize the system with correct calibrations and timings and to allow flexibility in the trigger algorithms. The control, testing and monitoring of these modules requires a comprehensive, but well-designed and modular, software framework, which we will describe in this paper.

Digital signal integrity and stability in the ATLAS level-1 calorimeter trigger

The ATLAS Level-1 calorimeter trigger is a hardware-based system with the goal of identifying high-pT objects and to measure total and missing ET in the ATLAS calorimeters within an overall latency of 2.5 s. This trigger system is composed of the Preprocessor which digitises about 7200 analogue input channels and two digital processors to identify high-pT signatures and to calculate the energy sums. The digital part consists of multi-stage, pipelined custom-built modules. The high demands on connectivity between the initial analogue stage and digital part and between the custom-built modules are presented. Furthermore the techniques to establish timing regimes and verify connectivity and stable operation of these digital links will be described.

Results of early phase of series production of ATLAS SCT barrel hybrids and modules

The ATLAS experiment is a general purpose experiment being constructed at the Large Hadron Collider (LHC) at CERN, Geneva. ATLAS is designed to exploit the full physics potential of LHC, in particular to study topics con- cerning the Higgs mechanism, Super-symmetry and CP violation. The cross sections for the processes under study are extremely small, requiring very high luminosity colliding beams. The SemiConductor Tracker (SCT) is an essential part of the Inner Detector tracking system of ATLAS. The active elements of the SCT is 4088 detector modules, tiled on four barrel cylinders and eighteen endcap disks. As a consequence of the high luminosity, the detector modules will operate in a harsh radiation environment. This the- sis describes work concerning radiation hardness, beam test performance and methods for production testing of detector modules. The radiation hardness studies have been focused on the electrical performance of the front-end ASIC and the detector module. The results have identifed features of the ASIC failing after irradiation and conrmed the good performance of the re-designed ASIC. The beam tests have been performed in the late prototyping and the pre-production phase, verifying the specied performance of the detector modules. Special effort have been made to evaluate the performance of irradiated detector modules. The assembly, quality assurance and characterisation of the detector modules will be done in the collaborating institutes. The thesis reports on methods developed for use during the production, to assess the electrical performance.