J. Godin

Spectrally efficient long-haul transmission of 22-Tb/s using 40-Gbaud PDM-16QAM with coherent detection

We report on the transmission of 1-Tb/s clusters of channels, composed by four 50-GHz-spaced WDM channels modulated with 40-Gbaud PDM-16QAM. We transmit 22-Tb/s data over 2,400 km, with a spectral efficiency of 5 bit/s/Hz.

Lateral design of InP/InGaAs DHBTs for 40 GBIT/s ICs

InP-based HBTs are now available exhibiting cut-off frequency well over 100 GHz even at 1 mA. In this paper, a 40 Gbit/s IC-oriented InP/InGaAs DHBT technology is presented with maximum Ft of 170 GHz and Fmax over 210 GHz with BV/sub ce0/>9 V, specific features of this technology have been developed to increase the design flexibility: high current gain and frequency performances are kept over a large range of collector currents (from 1 mA to 100 mA) and for various dimensions, this is achieved through size-specific lateral transistor design optimization, these features are required for high-performance 40 Gbit/s ICs designed for optical transmission systems, in which careful transistor optimization has to be performed according to its function in the circuit.

A DC-100 GHz frequency doubler in InP DHBT technology

Broad-band monolithic integrated active frequency doublers operating in dc-100-GHz frequency range are presented. Circuits are fabricated in a self-aligned InP double heterojunction bipolar transistor process. Three integrated doubler versions have been designed. Inductive peaking and active splitting effects are quantified and compared. Circuit measurements give sinusoidal output waveform at 100 GHz with an rms timing jitter of 400 fs. Circuits have a maximum conversion gain of +1 dB at 60 GHz. the fundamental suppression is better than 24 dB in the whole frequency range.

Investigation of the degradation mechanisms of InP/InGaAs DHBT under bias stress conditions to achieve electrical aging model for circuit design

Abstract The reliability of InP/InGaAs DHBT under high collector current densities and low junction temperatures is analyzed and modeled. From the Gummel characteristics, we observe several types of device degradation, resulting from the long term changes of base and collector current in both lower and higher base–emitter voltage ranges which impacts the reduction of DC current gain. In this paper, we investigate the underlying physical mechanism of base and collector current degradation with the help of TCAD device simulation. We chose the HICUM model level2 for the modeling purpose to evaluate the drift of model parameters according to stress time. The evolution of the model parameters is described with suitable equations to achieve a physics based compact electrical aging model. The aging laws and the parameter evolution equations with stress time are implemented in compact electrical aging model which allows us to simulate the impact of device failure mechanisms on the circuit in operating conditions.

Experimental assessment of transmission reach for uncompensated 32-GBaud PDM-QPSK and PDM-16QAM

We experimentally compare the transmission reach of PDM-16QAM and PDM-QPSK at 32 Gbaud over an uncompensated transmission link and characterize the impact of the hardware limitations stemming from the practical implementation of PDM-16QAM.

Advancements on reliability-aware analog circuit design

This paper presents a new physics-based method for reliability prediction and modeling of Integrated Circuits (ICs). By implementing transistor degradation mechanisms via differential equations in the transistor compact model, the aging of the circuit can be simulated over (accelerated) time under real conditions. Actually, each transistor in the circuit integrates the voltage, current and temperature stress it suffers which results in (slowly) varying model parameters over time. Due to its straightforward implementation in commercial Computer Aided Design (CAD) flows, this method allows designers creating reliability-aware circuit architectures at an early stage of the design procedure, well before real circuits are actually fabricated. Application examples and results are presented for an InP/InGaAs DHBT process, but the universality of the method makes it suitable also for silicon based technologies such as CMOS and (SiGe) BiCMOS.

A 50-GHz-small-signal-bandwidth 50 GSa/s Track&Hold Amplifier in InP DHBT technology

A differential 50 GSa/s Track and Hold Amplifier with a large bandwidth and a high dynamic range is designed and fabricated with a 320 GHz-Ft-InP-DHBT process. Transient, S-parameters and spectral measurements are presented. For −4 dBm input power, spectral measurements in track mode give a THD and a SFDR of −56.3 dB and −57.3 dB respectively up to 3 GHz and −45.6 dB and −46.2 dB respectively up to 17 GHz. These measured THD are equivalent to 9 and 7.3 ENOB.

InP DHBT Very High Speed Power-DACs for Spectrally Efficient Optical Transmission Systems

This paper reports on very high speed large swing digital-to-analog converter (DAC) suiting the generation of spectrally efficient optical transmission signals. 2-bit and 3-bit DACS with up to 4 Vpp swing, operating up to 50 GBaud, have been fabricated using our InP DHBT technology (FT ~280 GHz, FMAX ~270 GHz, BVCE0 ~5 V). These chips have been packaged and used to generate 16- and 64-QAM signals in optical transmission experiments at various bitrates.

Reliability of submicron InGaAs/InP DHBT under thermal and electrical stresses

Abstract We report on the reliability of InGaAs/InP DHBT technology which has applications in very high-speed ICs (over 100xa0Gbits/s). This work presents the results of accelerated aging tests under thermal and electrical stresses performed on HBT up to 2000xa0h. Stress conditions consist in applying collector–emitter bias V CE from 1.3 to 2.7xa0V and collector current densities J C of 400 and 610xa0kA/cm 2 . The corresponding junction temperatures T J extends from 83 to 137xa0°C. The base current ideality factor η B increase and the current gain β decrease have revealed a degradation of the base–emitter junction. The normalized current gain β norm drop has occurred earlier for higher V CE and/or higher T J . A 20% decrease of β norm chosen as the failure criterion leads to an activation energy of 1.1xa0eV.

A 1GSample/s, 15 GHz input bandwidth master-slave track-&-hold amplifier in InP-DHBT technology

A fully differential master-slave track-and-hold amplifier with 15 GHz input bandwidth is designed and fabricated in a 210-GHz-fTInP-DHBT process on a 1.6×2.8 mm2 chip. A Total Harmonic Distortion lower than −39 dB and a Third Harmonic Rejection greater than 45 dB are measured for 1 GSample/s and 4 dBm single-ended input signal. Time domain measurements are also presented.