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Dive into the research topics where J. Illade-Quinteiro is active.

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Featured researches published by J. Illade-Quinteiro.


Sensors | 2015

Distance Measurement Error in Time-of-Flight Sensors Due to Shot Noise

J. Illade-Quinteiro; Victor M. Brea; Paula López; Diego Cabello; Ginés Doménech-Asensi

Unlike other noise sources, which can be reduced or eliminated by different signal processing techniques, shot noise is an ever-present noise component in any imaging system. In this paper, we present an in-depth study of the impact of shot noise on time-of-flight sensors in terms of the error introduced in the distance estimation. The paper addresses the effect of parameters, such as the size of the photosensor, the background and signal power or the integration time, and the resulting design trade-offs. The study is demonstrated with different numerical examples, which show that, in general, the phase shift determination technique with two background measurements approach is the most suitable for pixel arrays of large resolution.


IEEE Sensors Journal | 2014

Low-Frequency CMOS Bandpass Filter for PIR Sensors in Wireless Sensor Nodes

Ginés Doménech-Asensi; Juan Manuel Carrillo-Calleja; J. Illade-Quinteiro; Felix Martinez-Viviente; José Ángel Díaz-Madrid; Francisco J. Fernandez-Luque; Juan Zapata-Pérez; Ramón Ruiz-Merino; Miguel Angel Domínguez

In this paper, a CMOS fourth-order low-frequency bandpass filter for passive pyroelectric infrared sensors is presented. The sensor is intended for use in wireless sensor nodes, demanding strict low power requirements. The final use of these sensor nodes is an ambient assisted living system for elderly people living alone at home. A NICERA RE200B passive pyroelectric infrared sensor with a measured steady operation current of 3.5 μA has been used. The filter has been implemented cascading two biquad OTA-C filtering stages. OTA-C topology has been selected due to the extremely large time constant of the filter. The second-order stage circuit has been prototyped in a 0.35-μm CMOS process and power consumption is below 6.5 μW from a 3 V supply. A central frequency of 1.49 Hz, with Q = 0.5, and a gain of 45 V/V was achieved.


Cellular Nanoscale Networks and their Applications (CNNA), 2014 14th International Workshop on | 2014

The dickson charge pump as voltage booster for light energy harvesting on CMOS vision chips

Esteban Ferro; J. Illade-Quinteiro; Victor M. Brea; Paula López; Diego Cabello; Ginés Doménech-Asensi

The photodiode structures on a vision chip can be configured in either imaging (IM) or energy harvesting (EHM) mode. The upper voltage achieved with on-chip energy harvesting is below 0.5 V on standard CMOS technologies, thus DC/DC converters are needed to reach the power supply of today CMOS technologies. This paper addresses the design of a Dickson charge pump to this purpose on a standard 0.18 μm CMOS technology. The paper provides data on how the photoconversion characteristics of the photodiodes change, as well as on how the performance metrics of a CMOS vision chip are affected when the energy harvested in EHM is used as power supply in IM.


international conference on electronics, circuits, and systems | 2012

A fourth order CMOS band pass filter for PIR sensors

Ginés Doménech-Asensi; F. Martínez-Viviente; J. Illade-Quinteiro; Juan Zapata-Pérez; Ramón Ruiz-Merino; José Alejandro López-Alcantud; Juan Martínez-Alajarín; Francisco J. Fernandez-Luque; J.M. Carrillo; Miguel Angel Domínguez

This paper describes a fourth order continuous time band pass filter used to filter analog signals coming from passive infrared sensors (PIR). Specifications for this filter are characterized by an extremely large time constant which strongly condition the topology of the filter used. Moreover, very low power consumption is also required, since these filters are implemented together with the sensor in wireless sensor motes for ambient intelligence applications where power dissipation is a key factor. In this paper a low power and low frequency fourth order CMOS band pass filtering for PIR signal conditioning is presented. Results obtained from simulations of this circuit show the initial validity of the proposed approach.


Semiconductor Science and Technology | 2015

Four-transistor pinned photodiodes in standard CMOS technologies for time-of-flight sensors

J. Illade-Quinteiro; Paula López; Victor M. Brea; Diego Cabello; Ginés Doménech-Asensi

This paper studies pinned photodiodes with transmission gates and floating diffusions (FD) as a possible pixel structure for time-of flight sensors fabricated in standard CMOS technologies. Although the doping profiles cannot be modified in standard technologies, it is possible to adjust the geometrical parameters that have an important influence on the performance of the devices. The study is made in terms of the uncertainty introduced in the distance measurement due to the dark current, the noise introduced by the reset transistor and the transmission speed of the photogenerated charges to the FD.


workshop on microelectronics and electron devices | 2014

Dark current in standard CMOS pinned photodiodes for Time-of-Flight sensors

J. Illade-Quinteiro; Victor M. Brea; Paula López; Beatriz Blanco-Filgueira; Diego Cabello; Ginés Doménech-Asensi

This paper deals with the optimal design of pinned photodiodes on standard CMOS technologies for Time-of-Flight sensors with the twofold objective of minimizing the dark current while ensuring an optimal charge transfer. The results are verified through CAD simulations with realistic doping profiles for a standard 0.18 μm CMOS technology. To the best of our knowledge, no similar analysis have been previously reported in the literature.


field programmable logic and applications | 2014

Simplification and hardware implementation of the feature descriptor vector calculation in the SIFT algorithm

P. Leyva; Ginés Doménech-Asensi; J. Garrigos; J. Illade-Quinteiro; Victor M. Brea; Paula López; Diego Cabello

This paper proposes a hardware implementation to speed up the calculation of the feature descriptor vector in the Scale-Invariant Feature Transform (SIFT) algorithm. The proposed architecture, which improves conventional solutions based on embedded processors or other hardware/software co-designs, computes a feature descriptor vector of 27 elements from a keypoint neighborhood of 15×15 pixels. This process comprises several steps, including complex operations such as vector normalization operations. The paper compares two different implementations: one being time-optimized and the other memory-optimized. Both approaches require 649 and 874 clock cycles respectively for a single feature vector calculation (6.49 μs and 8.74 μs for a 100 MHz FPGA).


Cellular Nanoscale Networks and their Applications (CNNA), 2014 14th International Workshop on | 2014

Custom design of pinned photodiodes in standard CMOS technologies for time-of-flight sensors

J. Illade-Quinteiro; Victor M. Brea; Paula López; Diego Cabello; Ginés Doménech-Asensi

In this paper two different structures for custom design of pinned photodiodes in standard CMOS technologies are presented and analyzed in terms of dark current.


international symposium on circuits and systems | 2016

Time-of-flight chip in standard CMOS technology with in-pixel adaptive number of accumulations

J. Illade-Quinteiro; Victor M. Brea; Paula López; Diego Cabello

This paper introduces a Time-of-Flight sensor of 50 χ 60 pixels in standard CMOS 0.18 μm technology with in-pixel adaptive number of accumulations and background suppression. Background suppression is carried out through two mechanisms, namely, the increase of signal to background ratio, and background subtraction. The pixel features a fill factor of 77% with an nwell over p-substrate diode of 50 × 50 μm2. The pixel senses the photocurrent through a transimpedance amplifier. Adaptive accumulations are performed with an in-pixel comparator that is also used for per-column A/D conversion as part of an 8-bit single-slope ADC. The sensor works with 4 square pulses of 50 ns. Simulations show that the chip could measure distances up to 7.5 m without optical filters for background levels up to 20 klux at video frame rate.


international symposium on circuits and systems | 2015

Dark current optimization of 4-transistor pixel topologies in standard CMOS technologies for time-of-flight sensors

J. Illade-Quinteiro; Victor M. Brea; Paula López; Diego Cabello

This paper studies the dark current (DC) of the photodiode (PD), the transmission gate (TG), and the floating diffusion (FD) in 4-Transistor (4T) pixels in standard CMOS technologies for Time-of-Flight (ToF) sensors through device simulations. The paper addresses the layout optimization in terms of DC for an nwell/psub and two custom pinned-photodiodes (PPD), stating their pros and cons.

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Diego Cabello

University of Santiago de Compostela

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Paula López

University of Santiago de Compostela

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Victor M. Brea

University of Santiago de Compostela

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Beatriz Blanco-Filgueira

University of Santiago de Compostela

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Esteban Ferro

University of Santiago de Compostela

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Manuel Suarez

University of Santiago de Compostela

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