J.L. Tauritz

Microwave modelling and measurement of the self- and mutual inductance of coupled bondwires

The modelling and measurement of the self- and mutual inductance of bonding wires up to 10 GHz is considered. Differences less than 10% between calculated and measured self inductances are reported. The influence of various parameters on the inductance is considered.

Advanced modeling of distortion effects in bipolar transistors using the Mextram model

The modeling of distortion effects in bipolar transistors due to the onset of quasi-saturation is considered. Computational results obtained using the Mextram and Gummel-Poon models as implemented in a harmonic balance simulator are compared with measured results.

Bipolar transistor epilayer design using the MAIDS mixed-level simulator

In this paper, we address the epilayer design of the bipolar transistor using the one-dimensional (1-D) mixed-level simulator MAIDS (microwave active integral device simulator). MAIDS facilitates simulation of the electrical behavior of bipolar (hetero) junction transistors with various doping profiles and under different signal conditions in a realistic circuit environment. MAIDS as implemented within Hewlett Packards microwave design system is a useful and promising tool in the development of bipolar transistors for large-signal conditions. Using MAIDS, we have identified the dominant bipolar transistor distortion sources with respect to the biasing conditions. Simulation results are compared with small- and large-signal measurements for the BFQ135 transistor, which has been developed for cable television (CATV) applications. By analyzing the measured and simulated data, we have developed an optimum epilayer design map for third-order intermodulation distortion that has proven to be particularly useful in the epilayer dimensioning of transistors for CATV applications.

Analysis and modeling of small-signal bipolar transistor operation at arbitrary injection levels

In this paper a study of small-signal operation of bipolar transistors is presented. Firstly, we derive the governing equations and the associated boundary conditions which describe the small-signal minority carrier transport in the quasi-neutral base region at arbitrary injection levels. Analytical solutions of the transport equations are then discussed. A consequence of the linearity of the transport equations is that the minority carrier currents at the device terminals can be expressed in terms of infinite polynomials of the complex variable. It is then shown that all the hitherto proposed non-quasi-static (NQS) models can be simply obtained by different approximations of the general current expressions. As a consequence, the differences between the various models are clarified, and models previously developed for the low-injection regime are extended to high-injection conditions. The dependence of fundamental model parameters such as the transit time, the partitioning factor, etc., on the injection level is analyzed in detail, and a simple analytical formulation is proposed. Limitations of previous approaches are outlined. Finally, selected NQS models are compared.

A high gain silicon AGC amplifier with a 3 dB bandwidth of 4 GHz

In this paper, the design and realization of an integrated high frequency AGC amplifier in BiCMOS technology are discussed. The amplifier has 36 dB voltage gain, 4 GHz bandwidth, dynamic range exceeding 50 dB, low spectral distortion and low power consumption. The amplifier is suitable for application in wide-band optical telecommunication systems. >

A high frequency model based on the physical structure of the ceramic multilayer capacitor

Modeling of the high-frequency behavior of ceramic multilayer capacitors based on device physics is presented. An accurate predictive model incorporating physical dimensions, material constants, and aspects of the CMC application environment is presented. This model is suitable for use in the design and development of improved high frequency CMC structures. >

Optimum dimensions of the epilayer for third-order intermodulation distortion

Dominant bipolar transistor distortion sources are identified with respect to the biasing conditions. Mixed-level simulator results are compared with small- and large-signal measurements. An optimum epilayer design map for third-order intermodulation distortion is presented.

A figure of merit for the high-frequency noise behavior of bipolar transistors

In this paper a new figure of merit for high frequency noise behavior for use in the evaluation and development of bipolar silicon process technology is introduced. Basic low noise design rules for optimum transistor biasing and emitter scaling are proposed. >

Advanced modelling of distortion effects in bipolar transistors using the Mextram model

Modelling of distortion effects in bipolar transistors due to the onset of quasi saturation is considered. Computational results obtained using Mextram and Gummel Poon models as implemented in a harmonic balance simulator are compared with measured results.

Thermal resistance modelling of RF high power bipolar transistors

Thermal modelling of RF high power bipolar transistors including the ther mal resistance of the silicon die and the beryllium oxide package as well as the temperature dependence of their thermal conductivities is considered To model power transistors the non linear heat conduction equation is con verted to a linear heat equation using Kirchho s transformation The linear problem is solved using a Green s function method and the Kirchho transformation is e ectuated via a non linear voltage transformation Introduction RF high power transistors are used in base stations for mobile radio radar and satellite com munications to amplify signals to a power level of a few Watts or more Basically these devices consist of a package one or more matching capacitances bonding wires and a silicon die The silicon Si die has a number of active areas and each active area has a number of base and emitter ngers The accurate modelling of the thermal behaviour is of particular relevance since the tem perature in uences the electrical behaviour of the transistor and plays an important role in determining the safe operating area SOA of the device Several methods such as the Finite Element Method FEM and the Finite Di erence Time Domain method FDTD can be used to calculate the temperature at the junction of the devices These methods easily incorporate the temperature dependence of the thermal conduc tivity of the materials involved Simulation times however can be in the order of minutes or hours for the accurate modelling of practical problems Dramatic time savings can be achieved when Green s function methods are employed A principal drawback of this approach is that it fails to incorporate the temperature dependence of the thermal conductivity so that the method is limited to linear problems In this work a robust and e cient implementation of a method for calculating the temper ature distribution and the thermal resistance matrix in Hewlett Packard s Microwave Design System MDS is demonstrated The method is based on proper splitting of the thermal prob lem in a linear problem solved using a Green s function method followed by a non linear Kirchho transformation This division is advantageous in that we obviate the need to recom pute the thermal matrix at every simulation point as is done for example in Simulation times for practical problems are in the order of seconds making the method amendable to CAD applications Computation of the thermal resistance matrix In the thermal model the Si die is placed on top of the beryllium oxide BeO substrate of the package as illustrated in gure The BeO substrate is on top of the mounting base which is maintained at a constant reference temperature Junctions are located in the active areas just below the surface of the Si die where heat is generated due to power dissipation