J.-M. Palau

Determination of key parameters for SEU occurrence using 3-D full cell SRAM simulations

A 3-D entire SRAM cell, based on a 0.35-/spl mu/m current CMOS technology, is simulated in this work with a DEVICE simulator. The transient current, resulting from a heavy ion strike in the most sensitive region of the cell, is studied as a function of the LET value, the cell layout and the ion penetration depth. A definition of the critical charge is proposed and two new methods are presented to compute this basic amount of charge only using SPICE simulations. Numerical applications are performed with two different generations of submicron CMOS technologies, including the determination of the sensitive thicknesses.

Device simulation study of the SEU sensitivity of SRAMs to internal ion tracks generated by nuclear reactions

Single-event upsets (SEUs) in static random access memories (SRAMs) are investigated using three-dimensional (3-D) full cell device simulations for tracks that do not cross the OFF n-channel MOSFET drain. These tracks are representative of the most probable geometrical cases when the ions are generated inside the device by nuclear reactions, and then address one important part of neutron- or protons-induced soft errors. It is found that the duration and magnitude of the ion-induced current pulse strongly depends on the track location. As a result, the flipping of the memory cell is delayed, and the critical charge involved during the upset is no longer constant. A linear relationship between the critical charge and the delay is found and is explained by the contribution of the ON p-channel MOSFET. The increase of the ion current pulse delay and broadening when the track is moved away from the drain is explained on the basis of the diffusion-collection mechanism. Indications on the size of the sensitive regions are derived.

Single particle-induced latchup

This paper presents an up-to-date overview of the single-event latchup (SEL) hard failure mode encountered in electronic device applications involving heavy ion environment. This phenomenon is specific to CMOS technology. Single-event latchup is discussed after a short description of the effects induced by the interaction of a heavy ion with silicon. Understanding these effects is necessary to understand the different failures. This paper includes a description of the latchup phenomenon and the different triggering modes, reviews of models and hardening solutions, and finally presents new developments in simulation approaches.

Simulation of nucleon-induced nuclear reactions in a simplified SRAM structure: scaling effects on SEU and MBU cross sections

Academic 128/spl times/128 bit structures are simulated to study soft error cross sections induced by high-energy nucleons (n/p) in SRAM memories. The distributions of secondary ions are obtained by the nuclear high energy transport code and analyzed in terms of energy deposited in the sensitive volume of each memory cell. Multiple-bit upset cross sections are compared to single-event upset cross sections, and trends associated with scaling effects are presented.

Detailed analysis of secondary ions' effect for the calculation of neutron-induced SER in SRAMs

A new method of neutron soft error rate calculation derived from device simulations and nuclear physics results is presented. The main inputs are only a critical linear energy transfer, a critical charge, and layout dimensions. No classical sensitive volume size is needed because the extension of the sensitive region is described in terms of the variation of the ion efficacy versus its position with respect to the sensitive drain.

SEU critical charge and sensitive area in a submicron CMOS technology

This work presents SEU phenomena in advanced SRAM memory cells. Using mixed-mode simulation, the effects of scaling on the notions of sensitive area and critical charge is shown. Specifically, we quantify the influence of parasitic bipolar action in cells fabricated in a submicron technology.

Criterion for SEU occurrence in SRAM deduced from circuit and device Simulations in case of neutron-induced SER

A reliable criterion for SEU occurrence simulation is presented. It expresses the relationship existing at threshold between the magnitude and duration of the ion-induced parasitic pulse. This criterion can be obtained by both three-dimensional device and SPICE simulations. Using this criterion, the simulated and experimental SER on 130 and 250 nm technologies are shown to be in good agreement.

Incidence of multi-particle events on soft error rates caused by n-Si nuclear reactions

Neutron reactions with silicon nuclei can be responsible for much of the soft errors rate (SER) observed, for instance, in high density memories. The nuclear reactions create ionizing particles that then can induce charge collection at sensitive nodes. In many cases, the nuclear reaction produces a shower of ions. Models for the prediction of SER are much more complicated if all the simultaneously created ions must be considered. In this paper, we examine the proportion of events in which a shower of particles is actually involved. Spallation reaction effects for incident neutrons in the 50-2000 MeV energy range are analyzed using a simple spherical structure. Calculations are performed using BRIC (B_ruyeres le Chatel I_ntra-nuclear C_ascade), an improved version of HETC (High Energy Transport Code). The results show that the proportion of events actually due to showers is less than 2% of the total number of SERs.

SEU response of an entire SRAM cell simulated as one contiguous three dimensional device domain

The first SEU response of a complete 3-D SRAM cell is presented. This simulation method allows one to verify the accuracy of the commonly used mixed-mode technique and to study coupling effects between different junctions of the cell.

Evidence of the ion's impact position effect on SEB in N-channel power MOSFETs

Triggering of Single Event Burnout (SEB) in Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) is studied by means of experiments and simulations based on real structures. Conditions for destructive and nondestructive events are investigated through current duration observations. The effect of the ions impact position is experimentally pointed out. Finally, further investigation with 2D MEDICI simulations show that the different regions of the MOSFET cell indeed exhibit different sensitivity with respect to burnout triggering. >