J. Mavor

A monolithic adaptive filter

Reports a monolithic adaptive filter which has been realized using purely analog sampled-data MOS and CCD techniques. The filter implements a full Widrow least mean-squares algorithm over 65 data points. Central to this design is a novel, compact analog multiplier/accumulator circuit, which is presented in detail. The 65-point adaptive filter, which is cascadable, dissipates 200 mW from a 15 V supply, and operates at sample rates up to 100 kHz.

High slew rate CMOS operational amplifier employing internal transistor compensation

A compact, high slew rate, low distortion CMOS operational amplifier employing an internal feedback transistor instead of the more usual compensation capacitor is reported, which is fabricated using an n-well CMOS silicon-gate technology. The operational amplifier has an open-loop gain exceeding 60dB, a slew rate of +36/−50 V per microsecond, a one-per-cent settling time of 0.25 microsecond, a total harmonic distortion of −73 dB and a power dissipation of 11.5 mW. The design principles are summarised with particular emphasis on the novel transistor feedback compensation circuit. Results for a switched-capacitor filter employing such an operational amplifier are summarised.

A WSI approach towards defect/fault-tolerant reconfigurable serial systems

A superchip for realizing ultra-large-scale integrated (ULSI) systems based on a wafer-scale integrated (WSI) circuit concept, which incorporates defect/fault tolerance and system reconfiguration, is introduced. The key features of the central architectural component, a large crossbar switch matrix, are described. A prototype has been fabricated in silicon technology. Hypothetical processor examples demonstrate the power of the superchip approach, and design/performance figures are discussed. >