J. Mulder

An area model for on-chip memories and its application

An area model suitable for comparing data buffers of different organizations (e.g. caches versus register files) and arbitrary sizes is described. The area model considers the supplied bandwidth of a memory cell and includes such buffer overhead as control logic, driver logic and tag storage. The model gave less than 10% error when verified against real caches and register files. It is shown that, comparing caches and register files in terms of area for the same storage capacity, caches generally occupy more area per bit than register files for small caches because the overhead dominates the cache area at these sizes. For larger caches, the smaller storage cells in the cache provide a smaller total cache area per bit than the register set. Studying cache performance (traffic ratio) as a function of area, it is shown that, for small caches (less than the area occupied by 256 registers bits-r.b.e.-or 32 b), direct-mapped caches perform significantly better than four-way set-associative caches and, for caches of medium areas (between 256 r.b.e. and 4096 r.b.e.), both direct-mapped and set-associative caches perform better than fully associative caches. >

General current-mode analysis method for translinear filters

Log-domain or translinear filters are regarded as being a promising alternative in the area of low-voltage filter design. To date, most publications have reported on synthesis of translinear filters. Although synthesis is more powerful than analysis, it must go together with a generally applicable analysis method in the same domain. In this paper, a general current-mode analysis method is proposed. By using a current-mode approach, we stay close to the existing theory on static translinear circuits, which might be beneficial in developing a general, possibly more powerful synthesis method.

An RMS-DC converter based on the dynamic translinear principle

Translinear or log-domain filters are theoretically exact realisations of linear differential equations. However, the dynamical translinear principle can also be applied to the implementation of nonlinear differential equations. In this paper, an RMS-DC converter is proposed, comprising a direct implementation of the corresponding nonlinear differential equation by means of the dynamical translinear principle. Correct operation of the circuit was verified through measurements.

A low-voltage ultra-low-power translinear integrator for audio filter applications

In this paper, the design and measurement of a l-V translinear integrator and its application in a controllable second-order lowpass filter for hearing instruments is presented. A semicustom version of the filter has been integrated in a standard 2-/spl mu/m, 7-GHz, bipolar IC process and operates at voltages down to 1 V, consumes only 6 /spl mu/A, and has a dynamic range of 57 dB for a total harmonic distortion below 2%. Its cutoff frequency is linearly adjustable in octaves from 1.6 to 8 kHz.

A wide-tunable translinear second-order oscillator

This paper describes the design and measurement of a translinear second-order oscillator. The circuit is a direct implementation of a nonlinear second-order differential equation and follows from a recently developed synthesis method for dynamic translinear circuits. It comprises only two capacitors and a handful of bipolar transistors and can be instantaneously controlled over a very wide frequency range by only one control current, which indicates its suitability for spread-spectrum communications. Its total harmonic distortion can be made small by design, which enables fully integrated transmitters. A semicustom test chip, fabricated in a standard 2-µ, 7-GHz, bipolar IC process, operates from a single supply voltage, which can be as low as 2 V and oscillates over 6 decades of frequency with -31 dB total harmonic distortion.

A syllabic companding translinear filter

A distortionless syllabic companding filter can be obtained theoretically by updating the state variables of the filter as a function of the compression signal. In translinear filters, this is accomplished by adding a compensation current to all the capacitors in the filter. This current can be generated using only one capacitor and one transistor. Simulation results of a translinear syllabic companding differential filter are presented.

A 3.3 V Current-Controlled √ -Domain Oscillator

In this paper, the strong inversion MOS analog of the recentlyproposed class of log-domain filters, or translinear filters, isproposed.The dynamic √ -domain principle, or dynamicvoltage-translinear principle, exploits the quadratic law, describing theMOS transistor in the strong inversion region, both to perform an expandingV-I conversion of the capacitor voltages and to implement multiplicationsand square roots of currents based on the voltage-translinear principle.Thepresented theory is applied to the design of a current-controlledtwo-integrator oscillator. Experiment results of a pure CMOS test IC showthe feasibility of the √ -domain principle. The realized oscillatorhas a THD of −42 dB and is linearly frequency tunable across 1.3decades.

A reduced-area low-power low-voltage single-ended differential pair

In analog very large scale integration (VLSI), a high computational density is important. Area savings can be obtained by operating the MOS transistor in the triode region, thus exploiting its symmetrical nature. Applying this theory to a single-ended differential pair results in an area reduction of up to a factor 1.5, which can be significant, e.g., for neural networks, where the basic cells are repeated many times on a single chip. The proposed circuit also has advantages with respect to low-power and low-voltage operation.

Analysis of noise in translinear filters

To describe the effects of noise in translinear filters, large-signal equations have to be used, due to the internal non-linearities and the nonstationary nature of the noise sources. In this paper, a noise analysis method is proposed, which takes into account the non-linear and non-stationary aspects. As an example, the signal/spl times/noise intermodulation is calculated for a class A and a class AB operated log-domain filter.

An ultra-low-power, low-voltage electronic audio delay line for use in hearing aids

In this paper, the design of an electronic audio delay line, realized with a second-order all-pass filter, is presented. The designed filter is primarily intended for use in hearing aids, to provide directivity by a specially designed microphone array. The filter operates at a supply voltage of as low as 1.8 V. The simulated and measured total quiescent current is 0.9 /spl mu/A. Owing to current companding and class-AB operation, the dynamic range is 62 dB at a total harmonic distortion (THD) below 7%, i.e., at maximum output. The delay time is adjustable by control currents. The filter has been integrated in a standard bipolar process. The total measured delay time of the all-pass filter is approximately 110 /spl mu/s over a bandwidth of 4 kHz.