J. P. Liu

Strain relaxation in transistor channels with embedded epitaxial silicon germanium source/drain

We report on the channel strain relaxation in transistors with embedded silicon germanium layer selectively grown in source and drain areas on recessed Si(001). Nanobeam electron diffraction is used to characterize the local strain in the device channel. Our results show that strain is reduced in the device channel regions after implantation and thermal anneal.

Determination of Raman Phonon Strain Shift Coefficient of Strained Silicon and Strained SiGe

The use of Raman spectroscopy to characterize strain in strained Si and strained SiGe has been widely accepted. To use Raman spectroscopy for quantitative biaxial strain measurements, the strain shift coefficient for Si–Si vibration from strained Si (bSi–SiStSi) and strained SiGe (bSi–SiStSiGe) must be known. So far, bSi–SiStSiGe is commonly used to calculate strain in strained Si, which may result in inaccurate strain values. In this work, we report the first direct measurement of bSi–SiStSi by correlating high-resolution X-ray diffraction and Raman spectroscopy, which yields a measured value of -784±4 cm-1. We also show that the strain shift coefficient of SiGe, bSi–SiStSiGe, is a strong function of Ge concentration (x), and follows the empirical relation: b=-773.9-897.7x for x<0.35.

Strain relaxation mechanism in a reverse compositionally graded SiGe heterostructure

A concept of compositional reverse-grading (RG) in SiGe∕Si heteroepitaxy has been proposed, in which the graded layer lattice mismatch starts at the highest value at the RG/Si interface and decreases to a final mismatch at the SiGe/RG interface. Using various characterization techniques, the authors show that this low-dislocation-density strain relaxation mechanism relies on the large nucleation rates of misfit dislocations at the abrupt RG/Si interface and the reduction of threading dislocations at the SiGe/RG interface by facilitating glide. The RG concept enables the growth of high-quality relaxed epitaxial layer on a thin buffer layer, suitable as a substrate for many microelectronic and optoelectronic applications.

A Novel Thin Buffer Concept for Epitaxial Growth of Relaxed SiGe Layers with Low Threading Dislocation Density

We demonstrate an approach for fabricating relaxed SiGe layers on Si substrate with low threading dislocation density using commercially available low-pressure chemical vapor deposition epitaxy systems. This approach involves a thin epitaxial buffer layer with a reversed Ge composition gradient, i.e., the Ge composition decreases from the Si substrate to the growing surface. On a 90 nm thick buffer, growth of SiGe layer with composition up to 32% Ge was demonstrated with a strain relaxation >80% and a threading dislocation density below 10 6 cm - 2 .

Thermal stability of a reverse-graded SiGe buffer layer for growth of relaxed SiGe epitaxy

We have recently developed a novel reverse-graded (RG) buffer system, in which the Ge content decreases with distance from the Si interface. These thin (90 nm) RG layers are capable of supporting the growth of relaxed SiGe layers (85% relaxed) with defect densities as low as 10 5 /cm 2 . Good quality strained Si has also been successfully grown on these substrates. However, the thermal stability of this novel heterostructure has not been explored. In this paper, we establish, by high-resolution X-ray diffraction, Raman spectroscopy, atomic force microscopy, and transmission electron microscopy, that the heterostructure is stable up to 1000°C with no further strain relaxation in both the RG layer and strained Si layer. Hence, it is clear that this thin RG heterostructure is highly suitable as a buffer system for the growth of high-mobility strained Si or Ge devices.

Low-dislocation-density strain relaxation of SiGe on a SiGe∕SiGeC buffer layer

We report an observation of strain relaxation in lattice-mismatched heteroepitaxial Si1−xGex layers, accompanied by a reduction in threading dislocation density (TDD). This occurs on a Si0.77Ge0.23 layer grown on top of alternating layers of Si0.77Ge0.23∕Si0.76Ge0.23C0.01. The present scheme allows us to grow a high-quality 85% relaxed Si0.77Ge0.23 layer with a TDD of ∼104∕cm2. The high-resolution transmission electron microscope results showed the presence of Si1−x−yGexCy domains (with x⩽0.23 and y⩽0.01) after annealing at 1000°C. We infer that the formation of these domains assist the low TDD relaxation by releasing the epitaxial misfit strain as localized discrete strain and by blocking the propagation of misfit dislocations.

Influence of substitutional carbon incorporation on implanted-indium-related defects and transient enhanced diffusion

It has been demonstrated that, by incorporating a thin ∼20 nm Si1−yCy (with y as low as 0.1%) layer at the deep indium implant end-of-range (EOR) region, the EOR defects and enhanced diffusion behavior associated with indium implant can be eliminated. The Si1−yCy layer was grown epitaxially followed by a silicon epitaxy cap of 60 nm. Indium implantations were performed at 1×1014 cm−2 at 115 keV followed by spike annealing at 1050 °C. The experimentally observed EOR defect and enhanced diffusion elimination are explained based on the undersaturation of implantation-induced silicon interstitials with the presence of substitutional carbon at the Si1−yCy layer.

Leakage suppression of gated diodes fabricated under low-temperature annealing with substitutional carbon Si/sub 1-y/C/sub y/ incorporation

We have demonstrated the fabrication of n/sup +/-p gated diodes using low-temperature annealing of 700/spl deg/C for 30 s with a significantly reduced junction leakage current. This is achieved with the incorporation of an epitaxially grown Si/sub 1-y/C/sub y/(y=0.0007) layer in the substrate located at the end-of-range (EOR) of arsenic implantations. The carbon devices show effectively suppressed EOR defects in the cross-sectional transmission electron microscopy images and leakage characteristics similar to the controlled silicon device fabricated under high-temperature annealing of 950/spl deg/C for 30 s. Arrhenius measurement of the leakage profiles has indicated identical leakage mechanism for both the pure silicon and carbon devices, thus signifying the substantial elimination of the secondary EOR defects resulted from the implantations despite the low-temperature annealing of the latter.

Loading Effect of Selective Epitaxial Growth of Silicon Germanium in Submicrometer-Scale Silicon (001) Windows

We report different loading effects in selective epitaxial deposition of silicon germanium on silicon (001) using different silicon sources, such as silane or dichlorosilane, and other conventional sources, such as germane, and hydrogen chloride in hydrogen carrier gas, in a low-pressure chemical vapor deposition system. Silane leads to lower relative deposition rates in a smaller silicon area, while dichlorosilane shows the opposite trend. Flowing silane and dichlorosilane simultaneously during deposition results in a similar deposition rate independent of exposed silicon area. Decreasing hydrogen chloride partial pressure is found to improve the loading effect for both the silane- and dichlorosilane-based process for a small active window of about 0.01 μm 2 . The results point to the importance of availability of the adsorbed species on the active silicon windows when their size is below 0.04 μm 2 .

Threading dislocation reduction by SiGeC domains in SiGe∕SiGeC heterostructure: Role of pure edge dislocations

The authors previously reported an unusual phenomenon of strain relaxation accompanied by a reduction in threading dislocation density (TDD) on a Si0.77Ge0.23 layer grown on top of alternating layers of Si0.77Ge0.23∕Si0.76Ge0.23C0.01 [Appl. Phys. Lett. 88, 041915 (2006)]. In this letter, the mechanism by which SiGeC domains, formed during annealing at 1000°C, assist in TDD annihilation process is further investigated. A g∙b analysis of transmission electron microscope images showed the formation of pure edge dislocations from the reaction of two 60° misfit dislocations, which glide and/or slip with the assistance of the localized interfacial strain of the SiGeC domains. TDD reduction in this structure is thus due to the annihilation of threading dislocation arms during misfit dislocation combination.