J. Roudet

Switching disturbance due to source inductance for a power MOSFET: analysis and solutions

In this paper some technological rules are given, in order to help the designer to choose correct parameter values (such as gate resistance), avoiding MOSFET switching disturbance due to common impedance coupling. The switching process is modeled, and the good understanding of switching disturbance leads to the desired technological rules, taking into account the MOSFET implementation (source inductance Ls).

Copper losses of flyback transformer: search for analytical expressions

Because analytical expressions are required to run optimization software, this subject is very topical. This work uses equivalent permeability to homogenize the winding structure and approximations for the window field. A progressive approach leads to the needed expressions for a transformer built around a gapped ferrite core. At every step, analytical expressions are compared to Flux3D simulation.

Volume optimization of a PFC flyback structure under electromagnetic compatibility, loss and temperature constraints

The aim of this paper is to present an analytical optimization approach of a flyback structure in PFC mode. Indeed, softwares like Saber, Pspice or Simplorer are effective means for the power electronics structure time-domain studies. However, if these structures have an AC input and a high switching frequency (various time scales), time-domain simulation becomes painful and expensive in memory and computing time. The study of EMC performances is also difficult because of the line impedance stabilizer network (LISN) time-constants which comes to penalize the time-domain simulation. In addition, in sizing and optimization process, results in short computing times are needed, so the time-domain simulation may be too time consuming. In this way, the paper proposes to carry out a compromise between the model accuracy and the tool rapidness and recommends the use of analytical models to optimize the passive element volume of a flyback structure by respecting EMC standards, by minimizing the whole losses dissipated in the structure (conduction and switching semiconductor losses, core and copper losses in the transformer) and by constraining the semiconductor junction, the winding and the magnetic circuit temperatures. Firstly, analytical models of the flyback structure for these various optimization aspects are developed, validated by numerical simulation or measures and integrated in an optimization process. Then, the optimization results are presented and validated thanks to a measurement workbench of the flyback structure.

Application of Dovvell method for nanocrystalline toroid high frequency transformers

The paper propose an improve calculation of copper-losses for toroid transformers based on the Dowell method. The theoretical predictions calculated from this approach are finally compared to experimental results.

Influence of a conductive plane on loop inductance

This paper describes how to compute inductance and resistance of any simple loop located near a conductive plane. The software used, InCa, has been presented in earlier papers. The image method is first used to take the ground plane into account. This modeling assumes infinite ground plane dimensions and conductivity. Results are compared to those 3D finite element software using specific shell elements. Effect of a finite conductivity is then analysed, using this 3D finite element tool with an impedance boundary condition. Finally, the ground plane is considered as a closed loop of finite dimensions and conductivity. Results are compared to measurements and the geometrical ground plane characteristics influence on loop inductance is studied. >

Modeling of Printed Circuit Board loop inductance

This paper describes a fast analytical method which provides equivalent inductance and resistance of any simple loop realized on a Printed Circuit Board (PCB). Furthermore, the current distribution over a conductor cross section is obtained. The results are compared both with 3D finite element software with shell elements, and to measurements. >

Electrical modeling of transformer connecting bars

Traditionally, connections in high-voltage, high-current, and low-frequency circuits are always considered as perfect short circuits, so to analyze their contribution to electrical performance of a structure is not considered necessary. We show here that, even for low-frequency structures, the electrical parasitic characteristics of cabling can lead to some unexpected performances. In particular, our study of outside connections of a 400 MVA transformer has shown current imbalances between the three phases and inside the phases. We achieved this by using a semianalytical method that is presented in this paper. Results show the need to model this part of the structure. This method has advantages over numerical techniques of calculation.

Influence of the cabling geometry on paralleled diodes in a high power rectifier

In this paper, the relationship between wiring geometry and current unbalances of paralleled diodes in a high-current rectifier is studied. An electrical modelling of one arm of the rectifier is carried out, using lumped inductances computed from geometrical data. After electrical simulation, current unbalances in paralleled semiconductors are observed. An action on the incriminated bar geometry allows a reduction of these unbalances.

Design of a PWM inverter regarding conducted EMC and losses: influence of some key parameters

An analytical model of both EMC and losses of a PWM inverter is presented, taking into account the most significant parameters. EMC representation replaces semiconductors with equivalent disturbance sources. Then, solving is achieved using simple transfer functions. Conduction losses are evaluated from on state voltage drop (taken from datasheet) and current in the switches. Commutation losses are computed from reference switching energy (datasheet) considered linear with the switched current. Based on this analytical approach, it is easy to investigate the role of the key design parameters of the inverter, regarding EMC and losses aspects. PWM strategy is thus investigated, as well as the DC bus level. Some variations on component technology are also presented.

Influence of an impedance step in interconnection inductance calculation

With increasing frequency and power integration in many power electronics applications, interconnection modeling becomes of great importance. The aim of this paper is to present how to take into account an impedance step in an interconnection track (solder pad for instance) using PEEC method (partial element equivalent circuit). The better way to decompose the discontinuity is studied, according to the frequency of interest. Results are compared to measurements, carried out on a printed circuit board (PCB) loop and to analytical resolution at low frequency.