J. Uceda

Concurrent and simple digital controller of an AC/DC converter with power factor correction based on an FPGA

Nowadays, most digital controls for power converters are based on DSPs. This paper presents a field programmable gate array (FPGA) based digital control for a power factor correction (PFC) flyback AC/DC converter. The main difference from DSP-based solutions is that FPGAs allow concurrent operation (simultaneous execution of all control procedures), enabling high performance and novel control methods. The control algorithm has been developed using a hardware description language (VHDL), which provides great flexibility and technology independence. The controller has been designed as simple as possible while maintaining good accuracy and dynamic response. Simulations and experimental results show the feasibility of the method, opening interesting possibilities in power converters control.

A simple dc-dc converter for the power supply of a cochlear implant

A resonant topology based on class-E is presented as the power supply of a cochlear implant. This topology has the important advantage of a small number of components and a grounded single switch. Zero voltage switching can be achieved, which significantly reduces switching losses and improves efficiency. A circuit has been designed, built and tested in order to check the feasibility of the topology for the mentioned contactless application. The results are very good, the efficiency has been clearly improved compared to the former system and the autonomy has increased.

Improving power factor correction in distributed power supply systems using PWM and ZCS-QR SEPIC topologies

The single-ended primary inductance converter (SEPIC) presents several advantages over boost and flyback topologies which make this converter convenient for use as a power factor preregulator (PFP). Due to this fact, both the pulsewidth modulation (PWM) and the zero-current switched quasi-resonant (ZCS-QR) SEPIC used as PFPs are studied. Stress in components and operation in continuous and discontinuous conduction mode are considered in the PWM case, while the use of full-wave and half-wave resonant switches is considered in the ZCS-QR case. The study of the PWM SEPIC used as a PFP reveals that both types of PFP control, multiplier approach and voltage-follower approach, can be used in PWM SEPIC, the first one when it operates in continuous conduction mode and the second one when it operates in discontinuous conduction mode. Regarding the ZCS-QR SEPIC used as PFP, both types of resonant switch (half-wave and full-wave) can be used.<<ETX>>

Magnetic integration for interleaved converters

In this paper several techniques for integration of magnetic components in interleaved converters are analyzed. Magnetic components define the way the energy is transformed. Several opposite approaches can be considered: from decoupled integrated inductors to tightly coupled inductors. The integration of inductors in the same core for multiphase converters is especially analyzed from the point of view of size, losses and coupling.

Analysis of the buck converter for scaling the supply voltage of digital circuits

The energy consumption in mobile systems has become a big challenge that limits high performance and autonomy in mobile systems. The dynamic voltage scaling (DVS) is a recent technique that reduces energy consumption varying dynamically the supply voltage of the system accordingly to the clock frequency. The buck topology is a good candidate to supply step variations of the output voltage meeting the DVS requirements. In this paper, it is analyzed which is the fastest output voltage evolution that can provide the Buck topology. The minimum time state transition in the buck converter and its corresponding control law are obtained applying the maximum principle or Pontryagins principle. Design criteria for the buck topology are derived from this result. The analysis is extended to a multiphase buck converter. The minimum time control law is validated in a prototype. The measurements are in good agreement with the theoretical results.

RCD clamp PWM forward converter with self driven synchronous rectification

The forward power converter with a dissipative clamp reset network (RCD clamp) is widely used due to its simplicity. In this paper, the efficiency of this topology is increased by means of the incorporation of self driven synchronous rectification. The inclusion in the power stage of several MOSFETs affects the circuit performance. Design guidelines and optimization of this new topology are carried out in this work. A low output voltage (3.3 V) and high power density prototype has been built, featuring very high efficiency (87.5%) at very high switching frequency (700 kHz).<<ETX>>

High efficiency PFC converter to meet EN61000-3-2 and A14

The introduction of Regulation EN61000-3-2 a few years ago has forced power supply engineers to design AC/DC power converters that meet the limits imposed by it. As a consequence and considering that unity power factor is not required, many alternatives to the classical two-stage approach have been proposed reducing the cost of the power supply, especially in low power applications. The recent publication of the Amendment 14, that modifies the definition of the Class D of EN61000-3-2, may change the scope again. In this paper, a new AC/DC converter is proposed. This converter has been designed to improve the efficiency over the classical two-stage approach by improving the energy management. Thus, output power is processed 1.2 times instead of twice. Moreover, the voltage on the storage capacitor is not very sensitive to input voltage variations making the optimisation of the converter easy. The line current has been analysed and a trade-off between efficiency and distortion has been found.

Optimized synchronous rectification stage for low output voltage (3.3 V) DC/DC conversion

A new strategy to obtain low output voltage (3.3 V) is presented in this paper. The output stage is optimized to minimize losses in the self-driven synchronous rectifiers, by means of a fixed frequency, fixed duty cycle (0.5) driving waveform. The output voltage is controlled by a high switching frequency preregulator. This preregulator can be removed if input voltage variation is low. Very high efficiency (93%) has been obtained in an actual prototype (3.3 V and 20 A) of the optimized SR stage.<<ETX>>

Analysis of the Buck Converter for Scaling the Supply Voltage of Digital Circuits

The energy consumption in mobile systems has become a big challenge that limits high performance and autonomy in mobile systems. The dynamic voltage scaling (DVS) is a recent technique that reduces energy consumption varying dynamically the supply voltage of the system accordingly to the clock frequency. The Buck topology is a good candidate to supply step variations of the output voltage meeting the DVS requirements. In this paper, it is analyzed which is the fastest output voltage evolution that can provide the Buck topology. The minimum time state transition in the Buck converter and its corresponding control law are obtained applying the Maximum Principle or Pontryagins Principle. Design criteria for the Buck topology are derived from this result. The analysis is extended to a multiphase Buck converter. The minimum time control law is validated in a prototype. The measurements are in good agreement with the theoretical results.

Concurrent and simple digital controller of an AC/DC converter with power factor correction

Nowadays, most digital controls for power converters are based on DSPs. This paper presents a field programmable gate array (FPGA) based digital control for a power factor correction (PFC) flyback AC/DC converter. The main difference is that FPGAs allow concurrent operation (simultaneous execution of all control procedures), enabling high performance and novel control methods. The control algorithm has been developed using a hardware description language (VHDL), which provides great flexibility and technology independence. The algorithm has been designed as simply as possible while maintaining good accuracy and dynamic response. Simulations and experimental results show the feasibility of the method.