Jack J.-Y. Kuo

On the Enhanced Impact Ionization in Uniaxial Strained p-MOSFETs

This letter reports a new mechanism for the enhanced impact-ionization rate (I_sub/I_d) present in short- channel uniaxial strained p-MOSFETs. Through the pinch-off voltage (V_dsat), we have assessed the impact of strain on the maximum channel electric field. Due to the strain-enhanced mobility, V_dsat becomes lower, resulting in the observed V_g-dependent enhancement in I_sub/I_d. This mechanism needs to be considered when one-to-one comparisons of the hot-carrier effect between strained and unstrained devices are made.

Impact of Uniaxial Strain on Low-Frequency Noise in Nanoscale PMOSFETs

This letter investigates the low-frequency noise characteristics and reports a new mechanism for uniaxial strained PMOSFETs. Through a comparison of the input-referred noise and the trap density of the gate dielectric/semiconductor interface between co-processed strained and unstrained devices, it is found that the tunneling attenuation length for channel carriers penetrating into the gate dielectric is reduced by uniaxial strain. The reduced tunneling attenuation length may result in smaller input-referred noise, which represents an intrinsic advantage of low-frequency noise performance stemming from process-induced strain.

A Comprehensive Investigation of Analog Performance for Uniaxial Strained PMOSFETs

This paper presents a comprehensive investigation of the analog performance for uniaxial strained PMOSFETs with sub -100 nm gate length. Through a comparison between co-processed strained and unstrained devices regarding important analog metrics such as transconductance to drain current ratio (g m/I d), dc gain, linearity, low-frequency noise, and device mismatch, the impact of process-induced uniaxial strain on the analog performance of MOS devices has been assessed and analyzed. Our results indicate that, although the drain current noise spectral density and drain current mismatch of the strained device under low gate voltage overdrive are increased because of the larger gate-bias sensitivity of carrier mobility, the strained device has almost the same low frequency and mismatch performance as the unstrained one at a given g m/I d. This paper may provide insights for analog design using advanced strained devices.

Impact of Process-Induced Uniaxial Strain on the Temperature Dependence of Carrier Mobility in Nanoscale pMOSFETs

This letter provides an experimental assessment of temperature dependence of mobility for advanced short-channel strained devices. By accurate split C-V mobility extraction under various temperatures, we examine the impact of process-induced uniaxial strain on the temperature dependence of mobility and mobility enhancement in nanoscale pMOSFETs. Our study indicates that the strain sensitivity of hole mobility becomes less with increasing temperature, and it is consistent with previous mechanical-bending result. Furthermore, the carrier-scattering mechanism for the pMOSFET under uniaxial compressive strain tends to be more phonon limited at a given vertical electric field, which explains the larger drain current sensitivity to temperature present in the compressively strained PFET.

Investigation of analogue performance for process-induced-strained PMOSFETs

This paper investigates the analogue performance of process-induced-strained PMOSFETs for system-on-a chip applications. Through a comparison between co-processed strained and unstrained PMOSFETs regarding important analogue metrics such as transconductance to drain current ratio (gm/Id), output resistance, dc gain and the gain-bandwidth product, the impact of process-induced uniaxial strain on the analogue performance of MOS devices has been assessed and analysed. Our study may provide insights for analogue design using advanced strained devices.

Investigation of low frequency noise in uniaxial strained PMOSFETs

We have investigated the low frequency noise characteristics for uniaxial strained PMOSFETs. In the low |V<inf>gst</inf>| regime, the 1/f noise is dominated by the carrier-number-fluctuations and the S<inf>Id</inf>/<inf>Id</inf>² is increased by the enhanced g<inf>m</inf>/I<inf>d</inf> for the strained device. Nevertheless, the S<inf>Id</inf>/I}<inf>d</inf>² of the strained device is almost the same as the unstrained one at a given g<inf>m</inf>/I<inf>d</inf>. Furthermore, with the application of uniaxial compressive strain, the attenuation length λ is reduced because of the increased out-on-plane effective mass and tunneling barrier height. The reduced λ may result in a smaller S<inf>Vg</inf>. In the high |V<inf>gst</inf>| regime, the 1/f noise is dominated by the mobility-fluctuations and the S<inf>Id</inf>/I<inf>d</inf>² is increased due to the larger Hooge parameter for the strained device.

Investigation and Analysis of Mismatching Properties for Nanoscale Strained MOSFETs

This paper investigates and analyzes the matching properties of nanoscale strained MOSFETs under various bias conditions. Through a comprehensive comparison between coprocessed strained and unstrained PMOSFETs, the impact of process-induced uniaxial strain on the matching performance of MOS devices has been assessed and analyzed. Our examination indicates that, in the low-gate-voltage-overdrive (|V_gst|) regime, the normalized drain current mismatch (¿(¿I_d)/I_d) of the strained device is almost the same as that of the unstrained one at a given transconductance to drain current ratio ( <i>g</i> _m/l_d). In the high |V_gst| linear regime, the ¿(¿I_d)/I_d for the strained device is smaller than that of the unstrained one because of its smaller normalized current factor mismatch. In the high |V_gst| saturation regime, the improvement in the ¿(¿I_d)/I_d for the strained device is further enhanced because of the reduced critical electric field at which the carrier velocity becomes saturated.

Enhanced Carrier-Mobility-Fluctuation Origin Low-Frequency Noise in Uniaxial Strained PMOSFETs

This letter reports our new findings on the impact of uniaxial strain on the low-frequency-noise characteristics in nanoscale PMOSFETs. It is found that the normalized drain current noise of the strained device in the high-gate-overdrive (V gst) regime is larger than its control counterpart. In addition, the enhanced carrier-mobility-fluctuation origin 1/f noise for the strained device in the high-|V gst| regime indicates that the carrier mobility in the strained device is more phonon limited, which represents an intrinsic strain effect on the low-frequency noise.

Temperature dependence of device mismatch and harmonic distortion in nanoscale uniaxial-strained pMOSFETs

This paper examines the temperature dependence of mismatching and harmonic distortion properties in nanoscale uniaxial strained pMOSFETs. Our results reveal that the temperature dependence of drain current mismatch as well as harmonics distortion can be modulated by uniaxial strain. In the high gate-voltage overdrive (|Vgst|) linear region, the compressively-strained device shows smaller increment in drain current mismatch than the unstrained counterpart as temperature decreases. In the high |Vgst| saturation region, opposite to the unstrained case, the drain current mismatch of the compressively-strained device decreases with temperature. The underlying mechanism is the larger temperature sensitivity of carrier mobility for the strained device. The larger temperature sensitivity of carrier mobility may also results in larger temperature sensitivity of the harmonic distortion amplitudes. Our study may provide insights for analog circuit design using advanced strained devices.

Temperature Dependence of Drain Current Mismatch in Nanoscale Uniaxial-Strained PMOSFETs

This letter reports new findings on the temperature dependence of mismatching properties in nanoscale uniaxial-strained pMOSFETs. Our results reveal that the temperature dependence of drain current mismatch can be modulated by uniaxial strain. In the high gate-voltage overdrive linear region, the compressively strained device shows smaller increment in drain current mismatch than the unstrained counterpart as temperature decreases. In the high saturation region, opposite to the unstrained case, the drain current mismatch of the compressively strained device decreases with temperature. The underlying mechanism is the larger temperature sensitivity of carrier mobility for the strained device.