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Dive into the research topics where William P.-N. Chen is active.

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Featured researches published by William P.-N. Chen.


IEEE Electron Device Letters | 2009

Impact of Uniaxial Strain on Low-Frequency Noise in Nanoscale PMOSFETs

Jack J.-Y. Kuo; William P.-N. Chen; Pin Su

This letter investigates the low-frequency noise characteristics and reports a new mechanism for uniaxial strained PMOSFETs. Through a comparison of the input-referred noise and the trap density of the gate dielectric/semiconductor interface between co-processed strained and unstrained devices, it is found that the tunneling attenuation length for channel carriers penetrating into the gate dielectric is reduced by uniaxial strain. The reduced tunneling attenuation length may result in smaller input-referred noise, which represents an intrinsic advantage of low-frequency noise performance stemming from process-induced strain.


IEEE Electron Device Letters | 2008

Impact of Process-Induced Strain on Coulomb Scattering Mobility in Short-Channel n-MOSFETs

William P.-N. Chen; Pin Su; Ken-Ichi Goto

This letter provides an experimental assessment of Coulomb scattering mobility for advanced short-channel strained devices. By accurate mobility extraction under various temperatures, we examine the impact of process-induced uniaxial strain on Coulomb mobility in short-channel nMOSFETs. This letter indicates that the Coulomb mobility has significant stress dependency. Moreover, the stress sensitivity of the Coulomb mobility shows strong temperature dependence. Because it is the interface scattering that counteracts the stress sensitivity of the bulk-impurity-limited mobility, further reducing the interface charges will be crucial to future mobility scaling.


IEEE Transactions on Electron Devices | 2009

A Comprehensive Investigation of Analog Performance for Uniaxial Strained PMOSFETs

Jack J.-Y. Kuo; William P.-N. Chen; Pin Su

This paper presents a comprehensive investigation of the analog performance for uniaxial strained PMOSFETs with sub -100 nm gate length. Through a comparison between co-processed strained and unstrained devices regarding important analog metrics such as transconductance to drain current ratio (g m/I d), dc gain, linearity, low-frequency noise, and device mismatch, the impact of process-induced uniaxial strain on the analog performance of MOS devices has been assessed and analyzed. Our results indicate that, although the drain current noise spectral density and drain current mismatch of the strained device under low gate voltage overdrive are increased because of the larger gate-bias sensitivity of carrier mobility, the strained device has almost the same low frequency and mismatch performance as the unstrained one at a given g m/I d. This paper may provide insights for analog design using advanced strained devices.


IEEE Transactions on Nanotechnology | 2008

Investigation of Coulomb Mobility in Nanoscale Strained PMOSFETs

William P.-N. Chen; Pin Su; Ken-Ichi Goto

This paper provides an experimental assessment of Coulomb scattering mobility for advanced strained devices. By accurate short-channel mobility extraction, we examine the impact of process-induced uniaxial strain on Coulomb mobility in short-channel pMOSFETs. Our extracted Coulomb mobility shows very weak stress dependency at room temperature. This finding has also been verified in both long- and short-channel devices by the four-point wafer bending measurement. Therefore, in order to maximize the process-induced strain efficiency on nanoscale pMOSFETs, lower surface impurity concentration is suggested to avoid the Coulomb mobility domination in carrier transport.


Journal of The Electrochemical Society | 2009

Series Resistance and Mobility Extraction Method in Nanoscale MOSFETs

William P.-N. Chen; Pin Su; K. Goto; Carlos H. Diaz

As strained-silicon and ultrashallow junction USJ techniques are widely used to optimize the carrier velocity and parasitic resistances in metal oxide semiconductor field effect transistors MOSFETs, an accurate determination of the parasitic source/drain series resistance Rsd for these nanoscale MOSFETs becomes a crucial issue. Because the series resistance may counteract the mobility enhancement in these strained devices, an accurate Rsd value has to be used in the extraction of intrinsic effective mobility eff during process development. Furthermore, the Rsd parameter is critical to evaluate the performance of USJ engineering works. Among several studies regarding Rsd extraction in the past, 1-4


IEEE Electron Device Letters | 2010

Impact of Process-Induced Uniaxial Strain on the Temperature Dependence of Carrier Mobility in Nanoscale pMOSFETs

William P.-N. Chen; Jack J.-Y. Kuo; Pin Su

This letter provides an experimental assessment of temperature dependence of mobility for advanced short-channel strained devices. By accurate split C-V mobility extraction under various temperatures, we examine the impact of process-induced uniaxial strain on the temperature dependence of mobility and mobility enhancement in nanoscale pMOSFETs. Our study indicates that the strain sensitivity of hole mobility becomes less with increasing temperature, and it is consistent with previous mechanical-bending result. Furthermore, the carrier-scattering mechanism for the pMOSFET under uniaxial compressive strain tends to be more phonon limited at a given vertical electric field, which explains the larger drain current sensitivity to temperature present in the compressively strained PFET.


Semiconductor Science and Technology | 2007

Investigation of analogue performance for process-induced-strained PMOSFETs

Jack J.-Y. Kuo; William P.-N. Chen; Pin Su

This paper investigates the analogue performance of process-induced-strained PMOSFETs for system-on-a chip applications. Through a comparison between co-processed strained and unstrained PMOSFETs regarding important analogue metrics such as transconductance to drain current ratio (gm/Id), output resistance, dc gain and the gain-bandwidth product, the impact of process-induced uniaxial strain on the analogue performance of MOS devices has been assessed and analysed. Our study may provide insights for analogue design using advanced strained devices.


international symposium on vlsi technology, systems, and applications | 2009

Investigation of low frequency noise in uniaxial strained PMOSFETs

Jack J.-Y. Kuo; William P.-N. Chen; Pin Su

We have investigated the low frequency noise characteristics for uniaxial strained PMOSFETs. In the low |V<inf>gst</inf>| regime, the 1/f noise is dominated by the carrier-number-fluctuations and the S<inf>Id</inf>/<inf>Id</inf><sup>2</sup> is increased by the enhanced g<inf>m</inf>/I<inf>d</inf> for the strained device. Nevertheless, the S<inf>Id</inf>/I}<inf>d</inf><sup>2</sup> of the strained device is almost the same as the unstrained one at a given g<inf>m</inf>/I<inf>d</inf>. Furthermore, with the application of uniaxial compressive strain, the attenuation length λ is reduced because of the increased out-on-plane effective mass and tunneling barrier height. The reduced λ may result in a smaller S<inf>Vg</inf>. In the high |V<inf>gst</inf>| regime, the 1/f noise is dominated by the mobility-fluctuations and the S<inf>Id</inf>/I<inf>d</inf><sup>2</sup> is increased due to the larger Hooge parameter for the strained device.


IEEE Transactions on Nanotechnology | 2010

Investigation and Analysis of Mismatching Properties for Nanoscale Strained MOSFETs

Jack J.-Y. Kuo; William P.-N. Chen; Pin Su

This paper investigates and analyzes the matching properties of nanoscale strained MOSFETs under various bias conditions. Through a comprehensive comparison between coprocessed strained and unstrained PMOSFETs, the impact of process-induced uniaxial strain on the matching performance of MOS devices has been assessed and analyzed. Our examination indicates that, in the low-gate-voltage-overdrive (|V<sub>gst</sub>|) regime, the normalized drain current mismatch (¿(¿I<sub>d</sub>)/I<sub>d</sub>) of the strained device is almost the same as that of the unstrained one at a given transconductance to drain current ratio ( <i>g</i> <sub>m</sub>/l<sub>d</sub>). In the high |V<sub>gst</sub>| linear regime, the ¿(¿I<sub>d</sub>)/I<sub>d</sub> for the strained device is smaller than that of the unstrained one because of its smaller normalized current factor mismatch. In the high |V<sub>gst</sub>| saturation regime, the improvement in the ¿(¿I<sub>d</sub>)/I<sub>d</sub> for the strained device is further enhanced because of the reduced critical electric field at which the carrier velocity becomes saturated.


IEEE Electron Device Letters | 2010

Enhanced Carrier-Mobility-Fluctuation Origin Low-Frequency Noise in Uniaxial Strained PMOSFETs

Jack J.-Y. Kuo; William P.-N. Chen; Pin Su

This letter reports our new findings on the impact of uniaxial strain on the low-frequency-noise characteristics in nanoscale PMOSFETs. It is found that the normalized drain current noise of the strained device in the high-gate-overdrive (V gst) regime is larger than its control counterpart. In addition, the enhanced carrier-mobility-fluctuation origin 1/f noise for the strained device in the high-|V gst| regime indicates that the carrier mobility in the strained device is more phonon limited, which represents an intrinsic strain effect on the low-frequency noise.

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Pin Su

National Chiao Tung University

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Jack J.-Y. Kuo

National Chiao Tung University

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Chenhsin Lien

National Tsing Hua University

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Jia-Shung Wang

National Tsing Hua University

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